Export 174 results:
Author Title Type [ Year
] Filters: First Letter Of Last Name is B [Clear All Filters]
"Jailbreak Imagers: Transforming a Single-Photon Image Sensor into a True Random Number Generator",
International Image Sensor Workshop (IISW), Snowbird Resort, Utah, USA, June, 2013.
"Jailbreak Imagers: Transforming a Single-Photon Image Sensor into a True Random Number Generator",
International Image Sensor Workshop (IISW), Snowbird Resort, Utah, USA, June, 2013.
"Lightweight AES-Based Authenticated Encryption",
Fast Software Encryption (FSE), Singapore, March, 2013.
"Run-time Optimization of a Dynamically Reconfigurable Embedded System Through Performance Prediction",
23rd International Conference on Field Programmable Logic and Applications (FPL), Porto, Portugal, IEEE, 09/2013.
"Self-Organizing Real-Time Services in Mobile Ad Hoc Networks",
Self-Organization in Embedded Real-Time Systems: Springer New York, pp. 55-74, 2013.
"Sleuth: Automated Verification of Software Power Analysis Countermeasures",
Workshop on Cryptographic Hardware and Embedded Systems (CHES), Santa Barbara, California, USA, August, 2013.
"Stealthy Dopant-Level Hardware Trojans",
Workshop on Cryptographic Hardware and Embedded Systems (CHES), Santa Barbara, California, USA, August, 2013.
"Stealthy Dopant-Level Hardware Trojans",
Workshop on Cryptographic Hardware and Embedded Systems (CHES), Santa Barbara, California, USA, August, 2013.
"Compact Implementation and Performance Evaluation of Hash Functions in ATtiny Devices",
11th Smart Card Research and Advanced Application Conference (CARDIS), Graz, Austria, November, 2012.
"A Fast ULV Logic Synthesis Flow in Many-Vt CMOS Processes for Minimum Energy Under Timing Constraints",
IEEE Transactions on Circuits and Systems II: Express Briefs , vol. 59-II, issue 12, pp. 947-951, 02/2012.
"Interaction between Fault Attack Countermeasures and the Resistance against Power Analysis Attacks",
Fault Analysis in Cryptography: Springer Berlin Heidelberg, pp. 257-272, 2012.
"Simulation-Time Security Margin Assessment against power-based Side Channel Attacks",
7th Workshop on Embedded Systems Security (WESS), Tampere, Finland, October, 2012.
"Using Multi-objective Design Space Exploration to Enable Run-time Resource Management for Reconfigurable Architectures",
Proc. Design, Automation Test in Europe Conf. Exhibition (DATE), March, 2012.
"AETHER: Self-Adaptive Networked Entities: Autonomous Computing Elements for Future Pervasive Applications and Technologies",
Reconfigurable Computing: From FPGAs to Hardware/Software Codesign, New York, USA, Springer, pp. 149–184, 2011.
"AETHER: Self-Adaptive Networked Entities: Autonomous Computing Elements for Future Pervasive Applications and Technologies",
Reconfigurable Computing: From FPGAs to Hardware/Software Codesign, New York, USA, Springer, pp. 149–184, 2011.
"Design Space Exploration of Parallel Architectures",
Multi-objective design space exploration of multiprocessor SoC architectures: the MULTICUBE approach, New York, USA, Springer, 2011.
"Energy-Throughput Simulation Approach for Heterogeneous LTE scenarios",
ISWCS'11: Proceedings of The Eighth International Symposium on Wireless Communication Systems, Aachen, Germany, pp. 1–5, November 6-9, 2011.
"Exploring the Feasibility of Low Cost Fault Injection Attacks on Sub-Threshold Devices through an Example of a 65nm AES Implementation",
7th Workshop on RFID Security and Privacy (RFIDSec), Amherst, Massachussets, USA, June, 2011.
"Exploring the Feasibility of Low Cost Fault Injection Attacks on Sub-Threshold Devices through an Example of a 65nm AES Implementation",
7th Workshop on RFID Security and Privacy (RFIDSec), Amherst, Massachussets, USA, June, 2011.
"A First Step Towards Automatic Application of Power Analysis Countermeasures",
48th Design Automation Conference (DAC), San Diego, Califorina, June, 2011.