Export 81 results:
Author Title Type [ Year] Filters: First Letter Of Last Name is L [Clear All Filters]
"Interface Synthesis in Multiprocessing Systems-on-Chips",
IP Based SoC Design 2004, Grenoble, December, 2004.
"A Methodology for Testing IPSec-based Systems",
SoftCOM 2004, Split, pp. 22-26, October, 2004.
"UML in an Electronic System Level Design Methodology",
UML-SOC'04, San Diego, California, pp. 47-52, June 6, 2004.
"UML Specifications Towards a Codesign Environment",
FDL'04, Lille, France, pp. 313-324, September 14-17, 2004.
"Automatic Synthesis of the Hardware/Software Interface in Multiprocessor Architectures",
FDL'05 - Forum on Specification and Design Languages, Lausanne, Switzerland, September 27-30, 2005.
"Design and Synthesis of Reusable Platforms with Programmable Interconnects",
UML-SoC 2005, Anaheim, California, pp. 43-48, June 12, 2005.
"Hardware/Software Partitioning and Interface Synthesis in Networks On Chip",
IP Based SoC Design 2005, Grenoble, France, December 7-8, 2005.
"A Methodology for Bridging the Gap between UML and Codesign",
UML for SOC Design, Dordrecht, The Netherlands, Springer, pp. 119-146, 2005.
"Hardware/software partitioning of operating systems: a behavioral synthesis approach",
GLSVLSI '06: Proceedings of the 16th ACM Great Lakes symposium on VLSI, Philadelphia, PA, USA, ACM Press, New York, USA, pp. 324–329, 2006.
"Application-Specific Topology Design Customization for STNoC",
DSD07, in proceedings of 10th EUROMICRO Conference on Digital System Design Architectures, Methods and Tools (DSD 07), Lübeck, Germany, August 29-31, 2007.
"A Data protection Unit for NoC-based Architecture",
CODES+ISSS 2007, in proceedings of the Fifth IEEE/ACM/FIP International Conference of Hardware/Software Codesign and System Synthesis (CODES+ISSS 2007), Salzburg, Austria, September 30, 2007.
"HardwareScheduling Support in SMP Architecture",
Design, Automation and Test in Europe(DATE), Nice, France, April 16-20, 2007.
"Mapping and Topology Customization Approaches for Application-Specific STNoC Designs",
IEEE Proceedings of ASAP'07 - 18th International Conference on Application-specific Systems, Architectures and Processors, Montréal, Québec, Canada, July, 2007.
"Rapid Creation of Application Models from Bandwidth Aware Core Graphs",
Proceedings of: IP Based SoC Design 2007, Grenoble, France, December 5-6, 2007.
"Simulation-based Methodology for Evaluating DPA-Resistance of Cryptographic Functional Units with Application to CMOS and MCML Technologies",
International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation (SAMOS IC 07), Samos, Greece, July 16-19, 2007.
"A Topology Design Customization Approach for (STNoC)",
Nano-Nets 07, in proceedings of 2nd International Conference on Nano-Networks (Nano-Nets 2007)., Catania, Italy, September 24-26, 2007.
"An Automated Design Flow for NoC-based MPSoCs on FPGA",
RSP 2008, The 19th IEEE/IFIP International Symposium on Rapid System Prototyping, Monterey, USA/CA, June 2-5, 2008.
"An Enhanced Service Provider Communication Interface with Client Priorization",
proceedings of IEEE/WFMC International Conference on e-Business, July 26-29, 2008.
Hardware scheduled SMP architectures,
, no. US 11/947,278, 06/2008.
"Implementation of a Reconfigurable Data Protection Module for NoC-based MPSoCs",
Proceedings of the 21st IPDPS 2007 Reconfigurable Architecture Workshop (RAW), 21th IEEE International Parallel and Distributed Processing Symposium, Miami, USA/FL, April, 2008.