Export 31 results:
Author Title Type [ Year
] Filters: First Letter Of Last Name is H [Clear All Filters]
"COOPER: Towards A Collaborative Open Environment of Project-centred Learning",
proceedings to EC-TEL'06 conference, Crete, Greece, October 1-4, 2006.
"The Potential of Speculative Class-Loading",
PPPJ 2007: Proceedings of the Principles and Practice of Programming in Java, Lisbon, Portugal, 2007.
"MULTICUBE: Multi-Objective Design Space Exploration of Multiprocessor Architectures for Embedded Multimedia Applications",
Proceedings of the DATE'09 workshop on Designing for Embedded Parallel Computing Platforms: Architectures, Design Tools, and Applications, Nice, France, April, 2009.
"Hardware Trojans for Inducing or Amplifying Side-Channel Leakage of Cryptographic Software",
2nd International Conference on Trusted Systems (INTRUST), Beijing, China, December, 2010.
"Multicube: Multi-objective design space exploration of multi-core architectures",
ISVLSI 2010: IEEE Annual Symposium on VLSI, Lixouri, Kefalonia - Greece, pp. 488–493, July, 2010.
"ADSC: Application-Driven Storage Control for Energy Efficiency",
Information and Communication on Technology for the Fight against Global Warming - First International Conference ICT-GLOW, vol. 6868, Toulouse, France, Springer, pp. 165-179, 08/2011.
"ADSC: Application-Driven Storage Control for Energy Efficiency",
Information and Communication on Technology for the Fight against Global Warming - First International Conference ICT-GLOW, vol. 6868, Toulouse, France, Springer, pp. 165-179, 08/2011.
"AETHER: Self-Adaptive Networked Entities: Autonomous Computing Elements for Future Pervasive Applications and Technologies",
Reconfigurable Computing: From FPGAs to Hardware/Software Codesign, New York, USA, Springer, pp. 149–184, 2011.
"AETHER: Self-Adaptive Networked Entities: Autonomous Computing Elements for Future Pervasive Applications and Technologies",
Reconfigurable Computing: From FPGAs to Hardware/Software Codesign, New York, USA, Springer, pp. 149–184, 2011.
"Exploring the Feasibility of Low Cost Fault Injection Attacks on Sub-Threshold Devices through an Example of a 65nm AES Implementation",
7th Workshop on RFID Security and Privacy (RFIDSec), Amherst, Massachussets, USA, June, 2011.
"Harvesting the potential of nano-CMOS for lightweight cryptography: An ultra-low-voltage 65 nm AES coprocessor for passive RFID tags",
Springer Journal of Cryptographic Engineering, vol. 1, issue 1, 2011.
"The MULTICUBE Design Flow",
Multi-objective Design Space Exploration of Multiprocessor SoC Architectures: Springer New York, pp. 3-17, 2011.
"MULTICUBE: Multi-Objective Design Space Exploration of Multi-Core Architectures",
VLSI 2010 Annual Symposium, vol. 105, Netherlands, Springer, pp. 47-63, 2011.
"Compact Implementation and Performance Evaluation of Block Ciphers in ATtiny Devices",
Progress in Cryptology - Africacrypt, Ifrance, Morocco, July, 2012.
"Compact Implementation and Performance Evaluation of Hash Functions in ATtiny Devices",
11th Smart Card Research and Advanced Application Conference (CARDIS), Graz, Austria, November, 2012.
"A Fast ULV Logic Synthesis Flow in Many-Vt CMOS Processes for Minimum Energy Under Timing Constraints",
IEEE Transactions on Circuits and Systems II: Express Briefs , vol. 59-II, issue 12, pp. 947-951, 02/2012.
"A Fast ULV Logic Synthesis Flow in Many-Vt CMOS Processes for Minimum Energy under Timing Constraints",
IEEE Transactions on Circuits and Systems II, vol. 59, issue 12, pp. 947-951, 2013.
"Self-Organizing Real-Time Services in Mobile Ad Hoc Networks",
Self-Organization in Embedded Real-Time Systems: Springer New York, pp. 55-74, 2013.
"A Combined Design-Time/Test-Time Study of the Vulnerability of Sub-Threshold Devices to Low Voltage Fault Attacks",
IEEE Transactions on Emerging Topics in Computing, vol. PP, issue 99, 04/2014.
"Responsiveness of Service Discovery in Wireless Mesh Networks",
20th Pacific Rim International Symposium on Dependable Computing (PRDC), Singapore, IEEE Computer Society, 11/2014.