Export 26 results:
Author Title [ Type
] Year Filters: First Letter Of Last Name is O [Clear All Filters]
"On Practical Discrete Gaussian Samplers For Lattice-Based Cryptography",
IEEE Transaction on Computers, In Press.
"An Investigation of Sources of Randomness Within Discrete Gaussian Sampling",
IACR Cryptology ePrint Archive, vol. 2017, pp. 298, 2017.
"An Investigation of Sources of Randomness Within Discrete Gaussian Sampling",
IACR Cryptology ePrint Archive, vol. 2017, pp. 298, 2017.
"A Framework for Disturbance Analysis in Smart Grids by Fault Injection",
Springer Journal on "Computer Science - Research and Development", 09/2016.
"Standard lattices in hardware",
Proceedings of the 53rd Annual Design Automation Conference DAC 2016, Austin, TX, USA, ACM, pp. 162, 06/2016.
"Special Session Paper: Efficient Arithmetic for lattice-based Cryptography",
Proceedings of the CODES+ISSS 2017, 2017.
"Secure architectures of future emerging cryptography",
International Conference on Computing Frontiers CF'16, Como, italy, ACM New York, pp. 315-322, 05/2016.
"Secure architectures of future emerging cryptography",
International Conference on Computing Frontiers CF'16, Como, italy, ACM New York, pp. 315-322, 05/2016.
"Secure architectures of future emerging cryptography",
International Conference on Computing Frontiers CF'16, Como, italy, ACM New York, pp. 315-322, 05/2016.
"Rapid Creation of Application Models from Bandwidth Aware Core Graphs",
Proceedings of: IP Based SoC Design 2007, Grenoble, France, December 5-6, 2007.
"MULTICUBE: Multi-Objective Design Space Exploration of Multiprocessor Architectures for Embedded Multimedia Applications",
Proceedings of the DATE'09 workshop on Designing for Embedded Parallel Computing Platforms: Architectures, Design Tools, and Applications, Nice, France, April, 2009.
"Multicube: Multi-objective design space exploration of multi-core architectures",
ISVLSI 2010: IEEE Annual Symposium on VLSI, Lixouri, Kefalonia - Greece, pp. 488–493, July, 2010.
"Lattice-based cryptography: From reconfigurable hardware to ASIC",
2016 International Symposium on Integrated Circuits (ISIC): IEEE, 12/2016.
"Lattice-based cryptography: From reconfigurable hardware to ASIC",
2016 International Symposium on Integrated Circuits (ISIC): IEEE, 12/2016.
"Exploring the Vulnerability of R-LWE Encryption to Fault Attacks",
Workshop on Cryptography and Security in Computing Systems of the HiPEAC2018 Conference, CS2 '18, New York, NY, USA, ACM, 2018.
"The design space of the number theoretic transform: A survey",
2017 International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation, {SAMOS} 2017, Pythagorion, Greece, July 17-20, 2017 (Invited), 2017.
"The Design of a High Speed ASIC Unit for the Hash Function SHA-256 (384,512)",
DATE '04: Proceedings of the conference on Design, automation and test in Europe, Washington, DC, USA, IEEE Computer Society, pp. 30070, 2004.
"Compact, Scalable, and Efficient Gaussian Samplers for Lattice-Based Cryptography",
Proceedings of the IEEE International Symposium on Circuits and Systems (ISCAS) 2018, 2018.
"Compact Implementation and Performance Evaluation of Hash Functions in ATtiny Devices",
11th Smart Card Research and Advanced Application Conference (CARDIS), Graz, Austria, November, 2012.
"Compact Implementation and Performance Evaluation of Block Ciphers in ATtiny Devices",
Progress in Cryptology - Africacrypt, Ifrance, Morocco, July, 2012.