Export 106 results:
Author Title [ Type
] Year Filters: First Letter Of Last Name is F [Clear All Filters]
Programmable data protection device, secure programming manager system and process for controlling access to an interconnect network for an integrated circuit,
, no. EP 20070301411, 04/2009.
Method of implementing one-to-one binary function and relative hardware device, especially for a Rijndael S-box,
, no. US 10/816,791 -- EP 20030425211, 10/2004.
Method and circuit for data encryption/decryption,
, no. US 09/974,705, April, 2003.
"A General Practitioner or a Specialist for Your Infected Smartphone?",
36th IEEE Symposium on Security and Privacy , San Jose, CA, USA, IEEE Computer Society Technical Committee on Security and Privacy, 05/2015.
"Time, Accuracy and Power Consumption Tradeoff in Mobile Malware Detection Systems",
Computers & Security, vol. 82, pp. 314-328, 05/2019.
"A system-level approach to adaptivity and fault-tolerance in NoC-based MPSoCs: The MADNESS project.",
Microprocessors and Microsystems - Embedded Hardware Design, vol. 37, issue 6-7, pp. 515–529, 2013.
"Secure Memory Accesses on Networks-on-Chip",
IEEE Transactions on Computers, vol. 57, no. 9, pp. 1216-1229, September, 2008.
"Scheduling Small packets in IPSec Multi-accelerator Based Systems",
Journal of Communication(JCM) Academy publisher, vol. 2, no. 2, Stresa, Italy, pp. 53-60, March, 2007.
"A Middleware Approach to Achieving Fault-tolerance of Kahn Process Networks on Networks-on-Chips",
International Journal of Reconfigurable Computing, vol. 2011, no. Article ID 295385: Hindawi, pp. 14 pages, February, 2011.
"Harvesting the potential of nano-CMOS for lightweight cryptography: An ultra-low-voltage 65 nm AES coprocessor for passive RFID tags",
Springer Journal of Cryptographic Engineering, vol. 1, issue 1, 2011.
"Fault-Tolerant Network Interfaces for Networks-on-Chip",
IEEE Trans. Dependable Secur. Comput., vol. 11, issue 1, pp. 16–29, 01/2014.
"Enabling Self-adaptivity in Component-based Streaming Applications",
ACM SIGBED Review - Special Issue on the 2nd International Workshop on Adaptive and Reconfigurable Embedded Systems, vol. 6, no. {3}: ACM SIGBED, pp. 14:1-14:4, 10/2009.
"Enabling Automated Bug Detection for IP-based Designs using High-Level Synthesis",
IEEE Design & Test, 2018, In Press.
"Enabling Automated Bug Detection for IP-based Designs using High-Level Synthesis",
IEEE Design & Test, 2018, In Press.
"Coordinated management of hardware and software self-adaptivity",
Journal of Systems Architecture, vol. 55, issue 3, no. {3}, pp. 170 - 179, 03/2009.
"A Configurable Monitoring Infrastructure for NoC-Based Architectures",
IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol. PP, issue 99, 2013.
"A Cloud to the Ground: The New Frontier of Intelligent and Autonomous Networks of Things",
IEEE Communication Magazine, vol. 54, issue 12, pp. 14 - 20, 11/2016.
"What Does the Memory Say? Towards the most indicative features for efficient malware detection",
CCNC 2016, The 13th Annual IEEE Consumer Communications & Networking Conference, Las Vegas, NV, USA, IEEE Communication Society, 01/2016.
"Trojan Families Identification Using Dynamic Features and Low Complexity Classifiers",
24th EICAR Annual Conference 2016 "Trustworthiness in IT Security Products", Nuremberg, Germany, EICAR, 10/2016.
"Towards an ESL design framework for adaptive and fault-tolerant MPSoCs: MADNESS or not?",
Embedded Systems for Real-Time Multimedia (ESTIMedia), 2011 9th IEEE Symposium on, 2011.