ALaRI Hang Glider

Search form

Education and Innovation in Embedded Systems Design

USI Università della Svizzera italiana, USI Faculty of Informatics, Advanced Learning and Research Institute USI Università della Svizzera italiana USI Faculty of Informatics USI Advanced Learning and Research Institute
Search by content:
Search by:
Export 38 results:
Author [ Title(Desc)] Type Year
Filters: First Letter Of Last Name is V  [Clear All Filters]
A B C D E F G H I J K L M N O P Q R S T U V W X Y Z 
C
Bailey, D. V., B. Baldwin, L. Batina, D. J. Bernstein, P. Birkner, J. W. Bos, G. van Damme, G. de Meulenaer, J. Fan, F. Gurkaynak, et al., "The Certicom Challenges ECC2-X", Workshop on Special Purpose Hardware for Attacking Cryptographic Systems (SHARCS), Lausanne, Switzerland, September, 2009.
Verzelli, P., L. Livi, and C. Alippi, "A characterization of the Edge of Criticality in Binary Echo State Networks", 2018 IEEE 28th International Workshop on Machine Learning for Signal Processing (MLSP), Aalborg, Denmark, 09/2018.
Balasch, J., B. Ege, T. Eisenbarth, B. Grard, Z. Gong, T. Gneysu, S. Heyse, S. Kerckhof, F. Koeune, T. Plos, et al., "Compact Implementation and Performance Evaluation of Hash Functions in ATtiny Devices", 11th Smart Card Research and Advanced Application Conference (CARDIS), Graz, Austria, November, 2012.
Balasch, J., B. Ege, T. Eisenbarth, B. Grard, Z. Gong, T. Gneysu, S. Heyse, S. Kerckhof, F. Koeune, T. Plos, et al., "Compact Implementation and Performance Evaluation of Hash Functions in ATtiny Devices", 11th Smart Card Research and Advanced Application Conference (CARDIS), Graz, Austria, November, 2012.
Balasch, J., B. Ege, T. Eisenbarth, B. Grard, Z. Gong, T. Gneysu, S. Heyse, S. Kerckhof, F. Koeune, T. Plos, et al., "Compact Implementation and Performance Evaluation of Hash Functions in ATtiny Devices", 11th Smart Card Research and Advanced Application Conference (CARDIS), Graz, Austria, November, 2012.
D
Mariani, G., P. Avasare, C. Ykman-Couvreur, G. Vanmeerbeeck, G. Palermo, C. Silvano, and V. Zaccaria, "Design Space Exploration for Run-Time Management of a Reconfigurable System for Video Streaming", Multi-objective design space exploration of multiprocessor SoC architectures: the MULTICUBE approach, 1: Springer, pp. 189-204, 2011.
Mariani, G., P. Avasare, C. Ykman-Couvreur, G. Vanmeerbeeck, G. Palermo, C. Silvano, and V. Zaccaria, "Design Space Exploration for Run-Time Management of a Reconfigurable System for Video Streaming", Multi-objective design space exploration of multiprocessor SoC architectures: the MULTICUBE approach, 1: Springer, pp. 189-204, 2011.
Mariani, G., P. Avasare, C. Ykman-Couvreur, G. Vanmeerbeeck, G. Palermo, C. Silvano, and V. Zaccaria, "Design Space Exploration of a Reconfigurable System for Supporting Video Streaming Run-time Management", Multi-objective design space exploration of multiprocessor SoC architectures: the MULTICUBE approach, New York, USA, Springer, 2011.
Avasare, P., C. Ykman-Couvreur, G. Vanmeerbeeck, G. Mariani, G. Palermo, C. Silvano, and V. Zaccaria, "Design Space Exploration Supporting Run-time Resource Management", Multi-objective design space exploration of multiprocessor SoC architectures: the MULTICUBE approach, New York, USA, Springer, 2011.
Valencia, F., A. Khalid, E. O'Sullivan, and F. Regazzoni, "The design space of the number theoretic transform: A survey", 2017 International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation, {SAMOS} 2017, Pythagorion, Greece, July 17-20, 2017 (Invited), 2017.
E
Bayrak, A. Galip, N. Velickovic, F. Regazzoni, D. Novo Bruna, P. Brisk, and P. Ienne, "An eda-friendly protection scheme against side-channel attacks", Design, Automation and Test in Europe (DATE), Grenoble, France, March, 2013.
Vukmirović, S., S. Luković, A. Erdeljan, and F. Kulić, "An enhanced workflow management for Utility Management System", Proceedings of the International Congress on Ultra Modern Telecommunications and Control Systems (ICUMT 2010), Moscow, Russia, October 18-20, 2010.
Valencia, F., T. Oder, T. Güneysu, and F. Regazzoni, "Exploring the Vulnerability of R-LWE Encryption to Fault Attacks", Workshop on Cryptography and Security in Computing Systems of the HiPEAC2018 Conference, CS2 '18, New York, NY, USA, ACM, 2018.
L
Oder, T., T. Güneysu, F. Valencia, A. Khalid, M. O'Neill, and F. Regazzoni, "Lattice-based cryptography: From reconfigurable hardware to ASIC", 2016 International Symposium on Integrated Circuits (ISIC): IEEE, 12/2016.
Avasare, P., G. Vanmeerbeeck, C. Ykman-Couvreur, G. Mariani, G. Palermo, V. Zaccaria, and C. Silvano, "Linking run-time management with design space exploration at multiple abstraction levels", Proceedings of the DATE'10 workshop on Designing for Embedded Parallel Computing Platforms: Architectures, Design Tools, and Applications, Dresden, Germany, March, 2010.
Kerckhof, S., F. Durvaux, N. Veyrat-Charvillon, F. Regazzoni, G. Meurice de Dormale, and F-X. Standaert, "Low Cost FPGA Implementations of the SHA-3 Finalists", 10th Smart Card Research and Advanced Application Conference (CARDIS), Leuven, Belgium, September, 2011.

Pages