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"Adaptable AES implementation with power-gating support", International Conference on Computing Frontiers CF'16, Como, Italy, ACM Ney York, NY, USA, pp. 331-334, 05/2016.
"An adaptable FPGA-based System for Regular Expression Matching", Proceedings of Design, Automation and Test in Europe (DATE) Conference, Munich, Germany, March 10-14, 2008.
"Adaptivity Support for MPSoCs based on Process Migration in Polyhedral Process Networks", VLSI Design, vol. 2012, no. Article ID 987209: Hindawi, pp. 15 pages, February, 2012.
"ADSC: Application-Driven Storage Control for Energy Efficiency", Information and Communication on Technology for the Fight against Global Warming - First International Conference ICT-GLOW, vol. 6868, Toulouse, France, Springer, pp. 165-179, 08/2011.
"AETHER: Self-Adaptive Networked Entities: Autonomous Computing Elements for Future Pervasive Applications and Technologies", Reconfigurable Computing: From FPGAs to Hardware/Software Codesign, New York, USA, Springer, pp. 149–184, 2011.
"An Application Level Synthesis Methodology for Embedded Systems", ISCAS 2002, Scottsdale, pp. 473-476, May 26-29, 2002.
"An Application Level Synthesis Methodology for Multidimensional Embedded Processing Systems", IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 22, no. 11, pp. 1457-1470, November, 2003.
"Application-Driven Optimization of VLIW Architectures: A Hardware-Software Approach", RTAS '05: Proceedings of the 11th IEEE Real Time on Embedded Technology and Applications Symposium, Washington, DC, USA, IEEE Computer Society, pp. 128–137, 03/2005.
"Application-Specific Topology Design Customization for STNoC", DSD07, in proceedings of 10th EUROMICRO Conference on Digital System Design Architectures, Methods and Tools (DSD 07), Lübeck, Germany, August 29-31, 2007.
"Area and Power Efficient Synthesis of DPA-Resistant Cryptographic SBoxes", International Conference on VLSI Design & Embedded Systems, Bangalore, India, January 6-10, 2007.
"ARTE: an Application-specific Run-Time Management Framework for Multi-cores based on Queuing Models", Parallel Computing, 2013.
"ARTE: an Application-specific Run-Time Management Framework for Multi-core Systems", Proceedings IEEE SASP'11 - Symposium on Application Specific Processors, San Diego, CA, USA, June, 2011.
"Automatic Application of Power Analysis Countermeasures", IEEE Transactions on Computers, vol. PP, issue 99, 12/2013.
"Automatic Application of Power Analysis Countermeasures", IEEE Transactions on Computers , vol. 64, issue 2, pp. 329-341, 02/2015.
"Breaking ECC2K-130", IACR Cryptology ePrint Archive, vol. 2009, pp. 541, 11/2009.
"Bridging the Gap between SysML and Design Space Exploration", FDL'06 Proceedings, Darmstadt, Germany, pp. 389-394, September 19-22, 2006.
"The Case for Polymorphic Registers in Dataflow Computing", International Journal of Parallel Programming, vol. 54, issue 5, pp. 54-62, 10/2018.
"The Certicom Challenges ECC2-X", Workshop on Special Purpose Hardware for Attacking Cryptographic Systems (SHARCS), Lausanne, Switzerland, September, 2009.
"Challenges in designing trustworthy cryptographic co-processors", IEEE International Symposium on Circuits and Systems (ISCAS) 2015, Lisbon, Portugal, IEEE, pp. 2009-2012, 09/2015.
"Code Generation from Statecharts: Simulation of Wireless Sensor Networks", Proceedings of DSD08, Parma, Italy, September, 2008.