Export 41 results:
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"(THOR) - The hardware onion router",
24th International Conference on Field Programmable Logic and Applications, (FPL) 2014, Munich, Germany, IEEE, 09/2014.
"TAO: Techniques for Algorithmic Obscuration during High-Level Synthesis",
Proceedings of the ACM/IEEE Design Automation Conference (DAC), 2018.
"TaintHLS: High-Level Synthesis For Dynamic Information Flow Tracking",
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, In Press.
"STRATOS: Open System For Tractors' Autonomous Operations",
5th International Conference on Automation Technology for Off-road Equipment (ATOE), Valencia, Spain, International Commission of Agricultural and Biosystems Engineering (CIGR), pp. 162-187, 07/2012.
"STRATOS: open System for TRAcTOrs’ autonomous OperationS",
EFITA Internation Conference on Sustainable Agriculture through ICT Innovation , Torino, Italy, European Federation for Information Technology in Agriculture, Food and the Environment, 06/2013.
"Standard lattices in hardware",
Proceedings of the 53rd Annual Design Automation Conference DAC 2016, Austin, TX, USA, ACM, pp. 162, 06/2016.
"Solving Multiobjective Optimization Problems in Unknown Dynamic Environments: An Inverse Modeling Approach",
IEEE Transactions on Cybernetics, vol. 47, issue 12, pp. 4223 - 4234, 11/2016, 2017.
"Simulation-based Methodology for Evaluating DPA-Resistance of Cryptographic Functional Units with Application to CMOS and MCML Technologies",
International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation (SAMOS IC 07), Samos, Greece, July 16-19, 2007.
"Simulation and Analysis of Negative-Bias Temperature Instability Aging on Power Analysis Attacks",
IEEE Int. Symposium on Hardware-Oriented Security and Trust, McLean, VA, USA, 05/2015.
"Security in NoC",
Networks-on-Chips: Theory and Practice: Taylor and Francis Group, LLC - CRC Press, pp. 157-194, 2009.
"Securing Hardware Accelerators: a New Challenge for High-Level Synthesis",
IEEE Embedded Systems Letters, vol. 3, issue 10, pp. 77-80, 11/2017, 2018.
"Secure architectures of future emerging cryptography",
International Conference on Computing Frontiers CF'16, Como, italy, ACM New York, pp. 315-322, 05/2016.
"Secure architectures of future emerging cryptography",
International Conference on Computing Frontiers CF'16, Como, italy, ACM New York, pp. 315-322, 05/2016.
"A Question Answering service for information retrieval in Cooper",
COOPER Workshop in conjunction with EC-TEL07 Conference, September 17, 2007.
"Power Attacks Resistance of Cryptographic S-boxes with added Error Detection Circuits",
proceedings of: '22nd IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems (DFT'07), Rome, Italy, September 26-28, 2007.
"Lattice-based cryptography: From reconfigurable hardware to ASIC",
2016 International Symposium on Integrated Circuits (ISIC): IEEE, 12/2016.
"An Investigation of Sources of Randomness Within Discrete Gaussian Sampling",
IACR Cryptology ePrint Archive, vol. 2017, pp. 298, 2017.
"Hardware Trojans for Inducing or Amplifying Side-Channel Leakage of Cryptographic Software",
2nd International Conference on Trusted Systems (INTRUST), Beijing, China, December, 2010.
"Hardware Trojans for Inducing or Amplifying Side-Channel Leakage of Cryptographic Software",
2nd International Conference on Trusted Systems (INTRUST), Beijing, China, December, 2010.
"Fresh Re-Keying: Security against Side-Channel and Fault Attacks for Low-Cost Devices",
Proceedings of Progress in Cryptology - Africacrypt, Stellenbosch, South Africa, May, 2010.