ALaRI Hang Glider

Search form

Education and Innovation in Embedded Systems Design

USI Università della Svizzera italiana, USI Faculty of Informatics, Advanced Learning and Research Institute USI Università della Svizzera italiana USI Faculty of Informatics USI Advanced Learning and Research Institute
Search by content:
Search by:
Export 352 results:
Author [ Title(Desc)] Type Year
A B C D E F G H I J K L M N O P Q R S T U V W X Y Z 
H
Chandra, S., F. Regazzoni, and M. Lajolo, "Hardware/software partitioning of operating systems: a behavioral synthesis approach", GLSVLSI '06: Proceedings of the 16th ACM Great Lakes symposium on VLSI, Philadelphia, PA, USA, ACM Press, New York, USA, pp. 324–329, 2006.
Hocquet, C., D. Kamel, F. Regazzoni, J-D. Legat, D. Flandre, D. Bol, and F-X. Standaert, "Harvesting the potential of nano-CMOS for lightweight cryptography: An ultra-low-voltage 65 nm AES coprocessor for passive RFID tags", Springer Journal of Cryptographic Engineering, vol. 1, issue 1, 2011.
Luković, S., and N. Christianos, "Hierarchical Multi-Agent Protection System for NoC based MPSoCs", Proceedings of the International Workshop on Security and Dependability for Resource Constrained Embedded Systems (SD4RCES 2010), Vienna, Austria, September 14, 2010.
Ferrante, A., and V. Piuri, "High-level Architecture of an IPSec-dedicated System on Chip", proceedings of NGI 2007, Trondheim, Norway, IEEE Press, May, 2007.
Pilato, C., K. Basu, M. Shayan, F. Regazzoni, and R. Karri, "High-Level Synthesis of Benevolent Trojans", Proceedings of the IEEE Design, Automation and Test in Europe Conference (DATE), 2019.
I
Kaitović, I., and M. Malek, "Impact of Failure Prediction on Availability: Modeling and Comparative Analysis of Predictive and Reactive Methods", IEEE Transactions on Dependable and Secure Computing, pp. 1-1, 2018.
Fiorin, L., S. Luković, and G. Palermo, "Implementation of a Reconfigurable Data Protection Module for NoC-based MPSoCs", Proceedings of the 21st IPDPS 2007 Reconfigurable Architecture Workshop (RAW), 21th IEEE International Parallel and Distributed Processing Symposium, Miami, USA/FL, April, 2008.
Alippi, C., Q. Wen, and M. Roveri, "An improved Hilbert-Huang Transform for non-linear and time-variant signals", 26th Italian Workshop on Neural Networks (WIRN 2016), Vietri sul Mare, Salerno, Italy, pp. 1-8, 05/2016.
Bu, L., D. Zhao, and C. Alippi, "An Incremental Change Detection Test Based on Density Difference Estimation", IEEE Transactions on Systems, Man, and Cybernetics: Systems, vol. 47, pp. 2714-2726, Oct, 2017.
Mariani, G., P. Avasare, G. Vanmeerbeeck, C. Ykman-Couvreur, G. Palermo, C. Silvano, and V. Zaccaria, "An industrial design space exploration framework for supporting run-time resource management on multi-core systems", Proceedings of Design, Automation and Test in Europe (DATE) Conference, Dresden, Germany, March, 2010.
Regazzoni, F., and P. Ienne, "Instruction Set Extensions for secure applications", Design, Automation Test in Europe Conference DATE 2016, Dresden, Germany, IEEE, pp. 1529-1534, 03/2016.
Bona, A., M. Sami, D. Sciuto, C. Silvano, V. Zaccaria, and R. Zafalon, "An Instruction-Level Methodology for Power Estimation and Optimization of Embedded VLIW cores", DATE 2002, Paris, pp. 1128, March 4-8, 2002.
Minosi, A., A. Martinola, S. Mankan, M. Prevostini, A N. Kostadinov, and F. Balzarini, "Intelligent, low-power and low-cost measurement system for energy consumption", VECIMS 2003, Lugano, pp. 125-130, July 27-29, 2003.
Regazzoni, F., L. Breveglieri, P. Ienne, and I. Koren, "Interaction between Fault Attack Countermeasures and the Resistance against Power Analysis Attacks", Fault Analysis in Cryptography: Springer Berlin Heidelberg, pp. 257-272, 2012.
Regazzoni, F., and M. Lajolo, "Interface Synthesis in Multiprocessing Systems-on-Chips", IP Based SoC Design 2004, Grenoble, December, 2004.
Prevostini, M., Introduction to SysML, , April 20, 2007.
Banik, S., A. Bogdanov, T. Isobe, H. Hiwatari, T. Akishita, and F. Regazzoni, "Inverse Gating for Low Energy Block Ciphers", Proceedings of the IEEE International Symposium on Hardware Oriented Security and Trust (HOST), 2018.
Bianchi, F. Maria, L. Livi, and C. Alippi, "Investigating echo state networks dynamics by means of recurrence analysis", IEEE Transactions on Neural Networks and Learning Systems, vol. 29, pp. 427 - 439, 02/2018.
Brannigan, S., N. Smyth, T. Oder, F. Valencia, E. O'Sullivan, T. Güneysu, and F. Regazzoni, "An Investigation of Sources of Randomness Within Discrete Gaussian Sampling", IACR Cryptology ePrint Archive, vol. 2017, pp. 298, 2017.
Ferrante, A., S. Chandra, and V. Piuri, "IPSec Database Query Acceleration", E-business and Telecommunications, vol. 23: Springer Berlin Heidelberg, pp. 188-200, 2009.

Pages