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Education and Innovation in Embedded Systems Design

USI Università della Svizzera italiana, USI Faculty of Informatics, Advanced Learning and Research Institute USI Università della Svizzera italiana USI Faculty of Informatics USI Advanced Learning and Research Institute
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S
Luković, S., and A. Srivastava, "System Level Approach to Denial-of-Service Detection in MPSoCs", Proceedings of the 7th Workshop on Embedded Systems Security (WESS'2012), A Workshop of the Embedded Systems Week (ESWEEK'12), 10/2012.
Derin, O., E. Cannella, G. Tuveri, P. Meloni, T. Stefanov, L. Fiorin, L. Raffo, and M. Sami, "A system-level approach to adaptivity and fault-tolerance in NoC-based MPSoCs: The MADNESS project.", Microprocessors and Microsystems - Embedded Hardware Design, vol. 37, issue 6-7, pp. 515–529, 2013.
Derin, O., E. Cannella, G. Tuveri, P. Meloni, T. Stefanov, L. Fiorin, L. Raffo, and M. Sami, "A system-level approach to adaptivity and fault-tolerance in NoC-based MPSoCs: The MADNESS project.", Microprocessors and Microsystems - Embedded Hardware Design, vol. 37, issue 6-7, pp. 515–529, 2013.
T
Güneys, T., F. Regazzoni, P. Sasdrich, and M. Wojcik, "(THOR) - The hardware onion router", 24th International Conference on Field Programmable Logic and Applications, (FPL) 2014, Munich, Germany, IEEE, 09/2014.
Palermo, G., G. Mariani, C. Silvano, R. Locatelli, and M. Coppola, "A Topology Design Customization Approach for (STNoC)", Nano-Nets 07, in proceedings of 2nd International Conference on Nano-Networks (Nano-Nets 2007)., Catania, Italy, September 24-26, 2007.
Castrillón, J., R. Velásquez, A. Stulova, W. Sheng, J. Ceng, R. Leupers, G. Ascheid, and H. Meyr, "Trace-based KPN Composability Analysis for Mapping Simultaneous Applications to MPSoC Platforms", Proceedings of Design, Automation and Test in Europe(DATE) Conference, Dresden, Germany, March, 2010.
Castrillón, J., R. Velásquez, A. Stulova, W. Sheng, J. Ceng, R. Leupers, G. Ascheid, and H. Meyr, "Trace-based KPN Composability Analysis for Mapping Simultaneous Applications to MPSoC Platforms", Proceedings of Design, Automation and Test in Europe(DATE) Conference, Dresden, Germany, March, 2010.
Y
Choudhury, A D., G. Palermo, C. Silvano, and V. Zaccaria, "Yield Enhancement by Robust Application-specific Mapping on Network-on-Chips", NoCArc'09: Proceedings of the Second International Workshop on Network on-Chip Architectures, New York City, USA, pp. 37–42, December, 2009.

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