Export 174 results:
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"Round gating for low energy block ciphers",
2016 IEEE International Symposium on Hardware Oriented Security and Trust, HOST, McLean, VA, USA, IEEE Computer Society, pp. 55-60, 05/2016.
"Round gating for low energy block ciphers",
2016 IEEE International Symposium on Hardware Oriented Security and Trust, HOST, McLean, VA, USA, IEEE Computer Society, pp. 55-60, 05/2016.
"Run-time Optimization of a Dynamically Reconfigurable Embedded System Through Performance Prediction",
23rd International Conference on Field Programmable Logic and Applications (FPL), Porto, Portugal, IEEE, 09/2013.
"SCA-Resistance for AES: How Cheap Can We Go?",
Progress in Cryptology – AFRICACRYPT 2018, Cham, Springer International Publishing, 2018.
"SCV2: A model-based validation and verification approach to system-of-systems engineering",
System of Systems Engineering Conference (SoSE), 2015 10th: IEEE, 05/2015.
"Secure architectures of future emerging cryptography",
International Conference on Computing Frontiers CF'16, Como, italy, ACM New York, pp. 315-322, 05/2016.
"Secure architectures of future emerging cryptography",
International Conference on Computing Frontiers CF'16, Como, italy, ACM New York, pp. 315-322, 05/2016.
"Simulation-based Methodology for Evaluating DPA-Resistance of Cryptographic Functional Units with Application to CMOS and MCML Technologies",
International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation (SAMOS IC 07), Samos, Greece, July 16-19, 2007.
"Simulation-Time Security Margin Assessment against power-based Side Channel Attacks",
7th Workshop on Embedded Systems Security (WESS), Tampere, Finland, October, 2012.
"Single-Photon Avalanche Diodes (SPADs) for quantum random number generators and beyond",
19th Asia and South Pacific Design Automation Conference (ASP-DAC) 2014, Singapore, IEEE, 01/2014.
"Single-Photon Avalanche Diodes (SPADs) for quantum random number generators and beyond",
19th Asia and South Pacific Design Automation Conference (ASP-DAC) 2014, Singapore, IEEE, 01/2014.
"Sleuth: Automated Verification of Software Power Analysis Countermeasures",
Workshop on Cryptographic Hardware and Embedded Systems (CHES), Santa Barbara, California, USA, August, 2013.
"The 'Smart Card System' project: From plastic money to mobile transaction support",
Technology Leadership Day - organized by the MicroSwiss Network, Fribourg, October 10, 2001.
"Speeding Up AES By Extending a 32 bit Processor Instruction Set",
ASAP '06: Proceedings of the IEEE 17th International Conference on Application-specific Systems, Architectures and Processors (ASAP'06), Washington, DC, USA, IEEE Computer Society, pp. 275-282, 2006.
"Speeding Up AES By Extending a 32 bit Processor Instruction Set",
ASAP '06: Proceedings of the IEEE 17th International Conference on Application-specific Systems, Architectures and Processors (ASAP'06), Washington, DC, USA, IEEE Computer Society, pp. 275-282, 2006.
"Standard lattices in hardware",
Proceedings of the 53rd Annual Design Automation Conference DAC 2016, Austin, TX, USA, ACM, pp. 162, 06/2016.
"Stealthy Dopant-Level Hardware Trojans",
Workshop on Cryptographic Hardware and Embedded Systems (CHES), Santa Barbara, California, USA, August, 2013.
"Stealthy Dopant-Level Hardware Trojans",
Workshop on Cryptographic Hardware and Embedded Systems (CHES), Santa Barbara, California, USA, August, 2013.
"A survey on hardware trojan detection techniques",
IEEE International Symposium on Circuits and Systems (ISCAS) 2015, 2015, Lisbon, Portugal, IEEE, pp. 2021-2024, 08/2015.
"Tairona, an Open Source Platform for Worldwide Meeting and Tutoring",
World Conference on Educational Multimedia, Hypermedia and Telecommunications 7 (ED-MEDIA 07), Vancouver, Canada, 2007.