Export 131 results:
Author Title Type [ Year
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"A Design Space Exploration Methodology Supporting Run-Time Resource Management for Multi-Processors System on-Chip",
Proceedings IEEE SASP'09 - Symposium on Application Specific Processors, San Francisco, CA, USA, July, 2009.
"Meta-model Assisted Optimization for Design Space Exploration of Multi-Processor Systems-on-Chip",
Euromicro Proceedings of DSD'09 - Conference on Digital System Design, Patras, Greece, August, 2009.
"MPSoCs Run-Time Monitoring through Networks-on-Chip",
The 2009 Conference on Design, Automation and Test In Europe (DATE'09), Nice, France, April/2009.
"Multicube Explorer - A Design Space Exploration Framework for Embedded Systems-on-Chip",
Proceedings of the DATE'09 workshop on Designing for Embedded Parallel Computing Platforms: Architectures, Design Tools, and Applications, Nice, France, April, 2009.
"MULTICUBE: Multi-Objective Design Space Exploration of Multiprocessor Architectures for Embedded Multimedia Applications",
Proceedings of the DATE'09 workshop on Designing for Embedded Parallel Computing Platforms: Architectures, Design Tools, and Applications, Nice, France, April, 2009.
"Multiprocessor System-on-Chip Design Space Exploration based on Multi-level Modeling Techniques",
Proceedings of IEEE IC-SAMOS'09 - International Conference on Embedded Computer Systems: Architectures, MOdeling, and Simulation, Samos, Greece, July, 2009.
Programmable data protection device, secure programming manager system and process for controlling access to an interconnect network for an integrated circuit,
, no. EP 20070301411, 04/2009.
"Security in NoC",
Networks-on-Chips: Theory and Practice: Taylor and Francis Group, LLC - CRC Press, pp. 157-194, 2009.
"Yield Enhancement by Robust Application-specific Mapping on Network-on-Chips",
NoCArc'09: Proceedings of the Second International Workshop on Network on-Chip Architectures, New York City, USA, pp. 37–42, December, 2009.
"An adaptable FPGA-based System for Regular Expression Matching",
Proceedings of Design, Automation and Test in Europe (DATE) Conference, Munich, Germany, March 10-14, 2008.
"Code Generation from Statecharts: Simulation of Wireless Sensor Networks",
Proceedings of DSD08, Parma, Italy, September, 2008.
"An Efficient Design Space Exploration Methodology for Multi-Cluster VLIW Architectures based on Artificial Neural Networks",
Proc. IFIP International Conference on Very Large Scale Integration VLSI - SoC 2008, Rhodes Island, Greece, October 13-15, 2008.
"An Enhanced Service Provider Communication Interface with Client Priorization",
proceedings of IEEE/WFMC International Conference on e-Business, July 26-29, 2008.
"Modelling the Power Cost of Security in Wireless Sensor Networks : the Case of 802.15.4",
Proceedings of IEEE ICT08, Saint Petersburg, Russia, June, 2008.
"A Protocol For Pervasive Distributed Computing Reliability",
SecPri_WiMob 2008, Avignon, France, IEEE, 10/2008.
"Secure Memory Accesses on Networks-on-Chip",
IEEE Transactions on Computers, vol. 57, no. 9, pp. 1216-1229, September, 2008.
"A Security Monitoring Service for NoCs",
Sixth IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and System Synthesis (CODES+ISSS'08), Atlanta, Georgia, USA., 10/2008.
"Application-Specific Topology Design Customization for STNoC",
DSD07, in proceedings of 10th EUROMICRO Conference on Digital System Design Architectures, Methods and Tools (DSD 07), Lübeck, Germany, August 29-31, 2007.
"Area and Power Efficient Synthesis of DPA-Resistant Cryptographic SBoxes",
International Conference on VLSI Design & Embedded Systems, Bangalore, India, January 6-10, 2007.
"A Data protection Unit for NoC-based Architecture",
CODES+ISSS 2007, in proceedings of the Fifth IEEE/ACM/FIP International Conference of Hardware/Software Codesign and System Synthesis (CODES+ISSS 2007), Salzburg, Austria, September 30, 2007.