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Education and Innovation in Embedded Systems Design

USI Università della Svizzera italiana, USI Faculty of Informatics, Advanced Learning and Research Institute USI Università della Svizzera italiana USI Faculty of Informatics USI Advanced Learning and Research Institute
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M
Silvano, C., W. Fornaciari, G. Palermo, V. Zaccaria, F. Castro, M. Martinez, S. Bocchio, R. Zafalon, P. Avasare, G. Vanmeerbeeck, et al., "Multicube: Multi-objective design space exploration of multi-core architectures", ISVLSI 2010: IEEE Annual Symposium on VLSI, Lixouri, Kefalonia - Greece, pp. 488–493, July, 2010.
Silvano, C., W. Fornaciari, G. Palermo, V. Zaccaria, F. Castro, M. Martinez, S. Bocchio, R. Zafalon, P. Avasare, G. Vanmeerbeeck, et al., "MULTICUBE: Multi-Objective Design Space Exploration of Multi-Core Architectures", VLSI 2010 Annual Symposium, vol. 105, Netherlands, Springer, pp. 47-63, 2011.
Silvano, C., W. Fornaciari, G. Palermo, V. Zaccaria, F. Castro, M. Martinez, S. Bocchio, R. Zafalon, P. Avasare, G. Vanmeerbeeck, et al., "MULTICUBE: Multi-Objective Design Space Exploration of Multi-Core Architectures", VLSI 2010 Annual Symposium, vol. 105, Netherlands, Springer, pp. 47-63, 2011.
Silvano, C., G. Palermo, V. Zaccaria, W. Fornaciari, R. Zafalon, S. Bocchio, M. Martinez, M. Wouters, G. Vanmeerbeeck, P. Avasare, et al., "MULTICUBE: Multi-Objective Design Space Exploration of Multiprocessor Architectures for Embedded Multimedia Applications", Proceedings of the DATE'09 workshop on Designing for Embedded Parallel Computing Platforms: Architectures, Design Tools, and Applications, Nice, France, April, 2009.
Silvano, C., G. Palermo, V. Zaccaria, W. Fornaciari, R. Zafalon, S. Bocchio, M. Martinez, M. Wouters, G. Vanmeerbeeck, P. Avasare, et al., "MULTICUBE: Multi-Objective Design Space Exploration of Multiprocessor Architectures for Embedded Multimedia Applications", Proceedings of the DATE'09 workshop on Designing for Embedded Parallel Computing Platforms: Architectures, Design Tools, and Applications, Nice, France, April, 2009.
Mariani, G., G. Palermo, C. Silvano, and V. Zaccaria, "Multiprocessor System-on-Chip Design Space Exploration based on Multi-level Modeling Techniques", Proceedings of IEEE IC-SAMOS'09 - International Conference on Embedded Computer Systems: Architectures, MOdeling, and Simulation, Samos, Greece, July, 2009.
O
Rigoni, E., C. Kavka, A. Turco, G. Palermo, C. Silvano, V. Zaccaria, and G. Mariani, "Optimization Algorithms for Embedded System Design Space Exploration", Multi-objective design space exploration of multiprocessor SoC architectures: the MULTICUBE approach, New York, USA, Springer, 2011.
Balać, K., M. Prevostini, and M. Malek, "Optimizing Sensor Nodes Placement for Fault-tolerant Trilateration-based Localization", IEEE Pacific Rim International Symposium on Dependable Computing (PRDC), Zhangjiajie, China, 11/2015.
Mariani, G., G. Palermo, C. Silvano, and V. Zaccaria, "OSCAR: an Optimization Methodology Exploiting Spatial Correlation in Multi-core Design Space", IEEE Transactions on Computer-Aided Design, vol. 21, issue 5, no. -: IEEE, pp. 740-753, 05/2012.
P
Ferrante, A., "Panel IoT and pervasive computing: are new definitions of security and privacy needed?", Malicious Software and Hardware in Internet of Things Co-located with ACM International Conference on Computing Frontiers 2018, Ischia, Naples, Italy, 05/2018.
Peña, J., A. Upegui, and E. Sanchez, "Particle Swarm Optimization with Discrete Recombination: An Online Optimizer for Evolvable Hardware", 1st NASA/ESA Conference on Adaptive Hardware and Systems (AHS-2006), Istanbul, Turkey, June 16-18, 2006.
Regazzoni, F., T. Eisenbarth, J. Großschädl, L. Breveglieri, P. Ienne, I. Koren, and C. Paar, "Power Attacks Resistance of Cryptographic S-boxes with added Error Detection Circuits", proceedings of: '22nd IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems (DFT'07), Rome, Italy, September 26-28, 2007.
Mura, M., M. Paolieri, L. Negri, F. Fabbri, and M. Sami, "Power Modeling and Power Analysis for IEEE 802.15.4: a Concurrent State Machine Approach", Proceedings of CCNC 2007, Las Vegas, USA, January 11-13, 2007.
Fiorin, L., G. Palermo, C. Silvano, V. Catalano, R. Locatelli, and M. Coppola, Programmable data protection device, secure programming manager system and process for controlling access to an interconnect network for an integrated circuit, , no. EP 20070301411, 04/2009.
Ferrante, A., R. Pompei, A. Stulova, and A V. Taddeo, "A Protocol For Pervasive Distributed Computing Reliability", SecPri_WiMob 2008, Avignon, France, IEEE, 10/2008.
Q
Regazzoni, F., A. Fowler, and I. Polian, "Quantum Era Challenges for Classical Computers", Proceedings of the 18th International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation, New York, NY, USA, ACM, 2018.
Ferrante, A., S. Chandra, and V. Piuri, "A Query Unit for the IPSec Databases", SECRYPT 2007, Barcelona, Spain, 07/2007.
R
Tumeo, A., F. Regazzoni, G. Palermo, F. Ferrandi, and D. Sciuto, "A Reconfigurable Multiprocessor Architecture for a Reliable Face Recognition Implementation", Proceedings of Design, Automation and Test in Europe (DATE) Conference, Dresden, Germany, March, 2010.
Paolieri, M., I. Bonesana, and M D. Santambrogio, "ReCPU: a Parallel and Pipelined Architecture for Regular Expression Matching", Proceedings of 15th Annual IFIP International Conference on Very Large Scale Integration {(IFIP-VLSI 07)},(best paper award), Atlanta, Georgia, USA, October 15-17, 2007.
Upasani, G., A. Calimera, A. Macii, E. Macii, and M. Poncino, "Reducing Timing Overhead in Simultaneously Clock-Gated and Power-Gated Designs by Placement-Aware Clustering", Proceedings of the 19th international workshop on Power and Timing Modeling, Optimization and Simulation (PATMOS 2009), Delft, The Netherlands, September 9-11, 2009.

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