Export 131 results:
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"Optimization Algorithms for Embedded System Design Space Exploration",
Multi-objective design space exploration of multiprocessor SoC architectures: the MULTICUBE approach, New York, USA, Springer, 2011.
"Power-Gated MOS Current Mode Logic (PG-MCML): A Power-Aware DPA-Resistant Standard Cell Library",
48th Design Automation Conference (DAC), San Diego, Califorina, June, 2011.
"Progettazione e valutazione di soluzioni wireless multi-hop per il monitoraggio ambientale",
MIARIA: Techologia e Conoscenza al Servizio della Sicurezza, Missaglia, Italy, Bellavite, pp. 108-120, 2011.
"Response Surface Modeling for Embedded System Design Space Exploration",
Multi-objective design space exploration of multiprocessor SoC architectures: the MULTICUBE approach, New York, USA, Springer, 2011.
"A Correlation-based Design Space Exploration Methodology for Multi-Processor Systems-on-Chip",
Proceedings of DAC 2010: Design Automation Conference, Anheim, CA, USA, pp. 120–125, June, 2010.
"Fresh Re-Keying: Security against Side-Channel and Fault Attacks for Low-Cost Devices",
Proceedings of Progress in Cryptology - Africacrypt, Stellenbosch, South Africa, May, 2010.
"Hardware Trojans for Inducing or Amplifying Side-Channel Leakage of Cryptographic Software",
2nd International Conference on Trusted Systems (INTRUST), Beijing, China, December, 2010.
"An industrial design space exploration framework for supporting run-time resource management on multi-core systems",
Proceedings of Design, Automation and Test in Europe (DATE) Conference, Dresden, Germany, March, 2010.
"Linking run-time management with design space exploration at multiple abstraction levels",
Proceedings of the DATE'10 workshop on Designing for Embedded Parallel Computing Platforms: Architectures, Design Tools, and Applications, Dresden, Germany, March, 2010.
"A Monitoring System for NoCs",
Proceedings of the Third International Workshop on Network on Chip Architectures (NoCArc'2010), Atlanta, Georgia, USA, December, 2010.
"Multicube Explorer: An Open Source Framework for Design Space Exploration of Chip Multi-Processors",
2PARMA: Proceedings of the Workshop on Parallel Programming and Run-time Management Techniques for Many-core Architectures, Hannover, Germany, February, 2010.
"Multicube: Multi-objective design space exploration of multi-core architectures",
ISVLSI 2010: IEEE Annual Symposium on VLSI, Lixouri, Kefalonia - Greece, pp. 488–493, July, 2010.
"Multicube: Multi-objective design space exploration of multi-core architectures",
ISVLSI 2010: IEEE Annual Symposium on VLSI, Lixouri, Kefalonia - Greece, pp. 488–493, July, 2010.
"A Reconfigurable Multiprocessor Architecture for a Reliable Face Recognition Implementation",
Proceedings of Design, Automation and Test in Europe (DATE) Conference, Dresden, Germany, March, 2010.
"Trace-based KPN Composability Analysis for Mapping Simultaneous Applications to MPSoC Platforms",
Proceedings of Design, Automation and Test in Europe(DATE) Conference, Dresden, Germany, March, 2010.
"Trace-based KPN Composability Analysis for Mapping Simultaneous Applications to MPSoC Platforms",
Proceedings of Design, Automation and Test in Europe(DATE) Conference, Dresden, Germany, March, 2010.
"Breaking ECC2K-130",
IACR Cryptology ePrint Archive, vol. 2009, pp. 541, 11/2009.
"The Certicom Challenges ECC2-X",
Workshop on Special Purpose Hardware for Attacking Cryptographic Systems (SHARCS), Lausanne, Switzerland, September, 2009.
"Creating an Embedded Systems Program from Scratch: Nine years of experience at ALaRI",
Proceedings of the 2009 Workshop on Embedded System Education, Grenoble, France, October, 2009.
"A Design Flow and Evaluation Framework for DPA-resistant Instruction Set Extensions",
Cryptographic Hardware and Embedded Systems (CHES), vol. 5747, Lausanne, Switzerland, Springer Berlin Heidelberg, pp. 205-219, September, 2009.