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Education and Innovation in Embedded Systems Design

USI Università della Svizzera italiana, USI Faculty of Informatics, Advanced Learning and Research Institute USI Università della Svizzera italiana USI Faculty of Informatics USI Advanced Learning and Research Institute
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2009
Mariani, G., G. Palermo, C. Silvano, and V. Zaccaria, "Multicube Explorer - A Design Space Exploration Framework for Embedded Systems-on-Chip", Proceedings of the DATE'09 workshop on Designing for Embedded Parallel Computing Platforms: Architectures, Design Tools, and Applications, Nice, France, April, 2009.
Silvano, C., G. Palermo, V. Zaccaria, W. Fornaciari, R. Zafalon, S. Bocchio, M. Martinez, M. Wouters, G. Vanmeerbeeck, P. Avasare, et al., "MULTICUBE: Multi-Objective Design Space Exploration of Multiprocessor Architectures for Embedded Multimedia Applications", Proceedings of the DATE'09 workshop on Designing for Embedded Parallel Computing Platforms: Architectures, Design Tools, and Applications, Nice, France, April, 2009.
Silvano, C., G. Palermo, V. Zaccaria, W. Fornaciari, R. Zafalon, S. Bocchio, M. Martinez, M. Wouters, G. Vanmeerbeeck, P. Avasare, et al., "MULTICUBE: Multi-Objective Design Space Exploration of Multiprocessor Architectures for Embedded Multimedia Applications", Proceedings of the DATE'09 workshop on Designing for Embedded Parallel Computing Platforms: Architectures, Design Tools, and Applications, Nice, France, April, 2009.
Mariani, G., G. Palermo, C. Silvano, and V. Zaccaria, "Multiprocessor System-on-Chip Design Space Exploration based on Multi-level Modeling Techniques", Proceedings of IEEE IC-SAMOS'09 - International Conference on Embedded Computer Systems: Architectures, MOdeling, and Simulation, Samos, Greece, July, 2009.
Choudhury, A D., G. Palermo, C. Silvano, and V. Zaccaria, "Yield Enhancement by Robust Application-specific Mapping on Network-on-Chips", NoCArc'09: Proceedings of the Second International Workshop on Network on-Chip Architectures, New York City, USA, pp. 37–42, December, 2009.
2008
Mariani, G., G. Palermo, V. Zaccaria, and C. Silvano, "An Efficient Design Space Exploration Methodology for Multi-Cluster VLIW Architectures based on Artificial Neural Networks", Proc. IFIP International Conference on Very Large Scale Integration VLSI - SoC 2008, Rhodes Island, Greece, October 13-15, 2008.
2007
Zaparanuks, D., M. Jović, and M. Hauswirth, "The Potential of Speculative Class-Loading", PPPJ 2007: Proceedings of the Principles and Practice of Programming in Java, Lisbon, Portugal, 2007.
2006
Bongio, A., J. van Bruggen, S. Ceri, V. Cristea, P. Dolog, A. Hoffmann, M. Matera, M. Mura, A V. Taddeo, X. Zhou, et al., "COOPER: Towards A Collaborative Open Environment of Project-centred Learning", proceedings to EC-TEL'06 conference, Crete, Greece, October 1-4, 2006.
Bongio, A., J. van Bruggen, S. Ceri, V. Cristea, P. Dolog, A. Hoffmann, M. Matera, M. Mura, A V. Taddeo, X. Zhou, et al., "COOPER: Towards A Collaborative Open Environment of Project-centred Learning", proceedings to EC-TEL'06 conference, Crete, Greece, October 1-4, 2006.
Negri, L., and D. Zanetti, "Power/Performance Tradeoffs in Bluetooth Sensor Networks", HICSS '06: Proceedings of the 39th Annual Hawaii International Conference on System Sciences, Washington, DC, USA, IEEE Computer Society, pp. 236.2, 2006.
2005
Negri, L., M. Sami, Q D. Tran, and D. Zanetti, "Flexible Power Modeling for Wireless Systems: Power Modeling and Optimization of two Bluetooth Implementations", WOWMOM '05: Proceedings of the Sixth IEEE International Symposium on a World of Wireless Mobile and Multimedia Networks (WoWMoM'05), Washington, DC, USA, IEEE Computer Society, pp. 408–416, 2005.
2003
Bircan, A., M. Macchetti, G M. Bertoni, L. Breveglieri, V. Zaccaria, and P. Fragneto, "About the Performances of the Advanced Encryption Standard in Embedded Systems with Cache Memory", ISCAS 2003, Bangkok, pp. 145-148, May 25-28, 2003.
Salvemini, L., M. Sami, D. Sciuto, C. Silvano, V. Zaccaria, and R. Zafalon, "A Methodology for efficient architectural exploration of energy-delay trade-offs for embedded systems", SAC 2003, Melbourne, pp. 672-678, March, 2003.
Salvemini, L., M. Sami, D. Sciuto, C. Silvano, V. Zaccaria, and R. Zafalon, "A Methodology for efficient architectural exploration of energy-delay trade-offs for embedded systems", SAC 2003, Melbourne, pp. 672-678, March, 2003.
2002
Bona, A., M. Sami, D. Sciuto, C. Silvano, V. Zaccaria, and R. Zafalon, "Energy Estimation and Optimization of Embedded VLIW Processors based on Instruction Clustering", 39th Design Automation Conference, New Orleans, pp. 886-891, June 10-14, 2002.
Bona, A., M. Sami, D. Sciuto, C. Silvano, V. Zaccaria, and R. Zafalon, "Energy Estimation and Optimization of Embedded VLIW Processors based on Instruction Clustering", 39th Design Automation Conference, New Orleans, pp. 886-891, June 10-14, 2002.
Bona, A., M. Sami, D. Sciuto, C. Silvano, V. Zaccaria, and R. Zafalon, "An Instruction-Level Methodology for Power Estimation and Optimization of Embedded VLIW cores", DATE 2002, Paris, pp. 1128, March 4-8, 2002.
Bona, A., M. Sami, D. Sciuto, C. Silvano, V. Zaccaria, and R. Zafalon, "An Instruction-Level Methodology for Power Estimation and Optimization of Embedded VLIW cores", DATE 2002, Paris, pp. 1128, March 4-8, 2002.

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