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"Secure Memory Accesses on Networks-on-Chip",
IEEE Transactions on Computers, vol. 57, no. 9, pp. 1216-1229, September, 2008.
"A Security Monitoring Service for NoCs",
Sixth IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and System Synthesis (CODES+ISSS'08), Atlanta, Georgia, USA., 10/2008.
"Breaking ECC2K-130",
IACR Cryptology ePrint Archive, vol. 2009, pp. 541, 11/2009.
"The Certicom Challenges ECC2-X",
Workshop on Special Purpose Hardware for Attacking Cryptographic Systems (SHARCS), Lausanne, Switzerland, September, 2009.
"Creating an Embedded Systems Program from Scratch: Nine years of experience at ALaRI",
Proceedings of the 2009 Workshop on Embedded System Education, Grenoble, France, October, 2009.
"A Design Flow and Evaluation Framework for DPA-resistant Instruction Set Extensions",
Cryptographic Hardware and Embedded Systems (CHES), vol. 5747, Lausanne, Switzerland, Springer Berlin Heidelberg, pp. 205-219, September, 2009.
"A Design Space Exploration Methodology Supporting Run-Time Resource Management for Multi-Processors System on-Chip",
Proceedings IEEE SASP'09 - Symposium on Application Specific Processors, San Francisco, CA, USA, July, 2009.
"Meta-model Assisted Optimization for Design Space Exploration of Multi-Processor Systems-on-Chip",
Euromicro Proceedings of DSD'09 - Conference on Digital System Design, Patras, Greece, August, 2009.
"MPSoCs Run-Time Monitoring through Networks-on-Chip",
The 2009 Conference on Design, Automation and Test In Europe (DATE'09), Nice, France, April/2009.
"Multicube Explorer - A Design Space Exploration Framework for Embedded Systems-on-Chip",
Proceedings of the DATE'09 workshop on Designing for Embedded Parallel Computing Platforms: Architectures, Design Tools, and Applications, Nice, France, April, 2009.
"MULTICUBE: Multi-Objective Design Space Exploration of Multiprocessor Architectures for Embedded Multimedia Applications",
Proceedings of the DATE'09 workshop on Designing for Embedded Parallel Computing Platforms: Architectures, Design Tools, and Applications, Nice, France, April, 2009.
"Multiprocessor System-on-Chip Design Space Exploration based on Multi-level Modeling Techniques",
Proceedings of IEEE IC-SAMOS'09 - International Conference on Embedded Computer Systems: Architectures, MOdeling, and Simulation, Samos, Greece, July, 2009.
Programmable data protection device, secure programming manager system and process for controlling access to an interconnect network for an integrated circuit,
, no. EP 20070301411, 04/2009.
"Security in NoC",
Networks-on-Chips: Theory and Practice: Taylor and Francis Group, LLC - CRC Press, pp. 157-194, 2009.
"Yield Enhancement by Robust Application-specific Mapping on Network-on-Chips",
NoCArc'09: Proceedings of the Second International Workshop on Network on-Chip Architectures, New York City, USA, pp. 37–42, December, 2009.
"A Correlation-based Design Space Exploration Methodology for Multi-Processor Systems-on-Chip",
Proceedings of DAC 2010: Design Automation Conference, Anheim, CA, USA, pp. 120–125, June, 2010.
"Fresh Re-Keying: Security against Side-Channel and Fault Attacks for Low-Cost Devices",
Proceedings of Progress in Cryptology - Africacrypt, Stellenbosch, South Africa, May, 2010.
"Hardware Trojans for Inducing or Amplifying Side-Channel Leakage of Cryptographic Software",
2nd International Conference on Trusted Systems (INTRUST), Beijing, China, December, 2010.
"An industrial design space exploration framework for supporting run-time resource management on multi-core systems",
Proceedings of Design, Automation and Test in Europe (DATE) Conference, Dresden, Germany, March, 2010.
"Linking run-time management with design space exploration at multiple abstraction levels",
Proceedings of the DATE'10 workshop on Designing for Embedded Parallel Computing Platforms: Architectures, Design Tools, and Applications, Dresden, Germany, March, 2010.