Export 65 results:
Author Title Type [ Year
] Filters: First Letter Of Last Name is C [Clear All Filters]
"Multicube Explorer: An Open Source Framework for Design Space Exploration of Chip Multi-Processors",
2PARMA: Proceedings of the Workshop on Parallel Programming and Run-time Management Techniques for Many-core Architectures, Hannover, Germany, February, 2010.
"Multicube: Multi-objective design space exploration of multi-core architectures",
ISVLSI 2010: IEEE Annual Symposium on VLSI, Lixouri, Kefalonia - Greece, pp. 488–493, July, 2010.
"A system level model of possible integration of Building Management System in SmartGrid",
Complexity in Engineering (COMPENG 2010), Rome, Italy, February 22-24, 2010.
"Trace-based KPN Composability Analysis for Mapping Simultaneous Applications to MPSoC Platforms",
Proceedings of Design, Automation and Test in Europe(DATE) Conference, Dresden, Germany, March, 2010.
"Trace-based KPN Composability Analysis for Mapping Simultaneous Applications to MPSoC Platforms",
Proceedings of Design, Automation and Test in Europe(DATE) Conference, Dresden, Germany, March, 2010.
"Breaking ECC2K-130",
IACR Cryptology ePrint Archive, vol. 2009, pp. 541, 11/2009.
"Breaking ECC2K-130",
IACR Cryptology ePrint Archive, vol. 2009, pp. 541, 11/2009.
"A Design Flow and Evaluation Framework for DPA-resistant Instruction Set Extensions",
Cryptographic Hardware and Embedded Systems (CHES), vol. 5747, Lausanne, Switzerland, Springer Berlin Heidelberg, pp. 205-219, September, 2009.
"IPSec Database Query Acceleration",
E-business and Telecommunications, vol. 23: Springer Berlin Heidelberg, pp. 188-200, 2009.
"Prediction of the type of heating with EnergyPlus program and fuzzy logic",
40th International Congress on Heating, Refrigerating and Air-conditioning (KGH Congress), Belgrade, Serbia, 12/2009.
Programmable data protection device, secure programming manager system and process for controlling access to an interconnect network for an integrated circuit,
, no. EP 20070301411, 04/2009.
Programmable data protection device, secure programming manager system and process for controlling access to an interconnect network for an integrated circuit,
, no. EP 20070301411, 04/2009.
"Reducing Timing Overhead in Simultaneously Clock-Gated and Power-Gated Designs by Placement-Aware Clustering",
Proceedings of the 19th international workshop on Power and Timing Modeling, Optimization and Simulation (PATMOS 2009), Delft, The Netherlands, September 9-11, 2009.
"Yield Enhancement by Robust Application-specific Mapping on Network-on-Chips",
NoCArc'09: Proceedings of the Second International Workshop on Network on-Chip Architectures, New York City, USA, pp. 37–42, December, 2009.
"Secure Memory Accesses on Networks-on-Chip",
IEEE Transactions on Computers, vol. 57, no. 9, pp. 1216-1229, September, 2008.
"Application-Specific Topology Design Customization for STNoC",
DSD07, in proceedings of 10th EUROMICRO Conference on Digital System Design Architectures, Methods and Tools (DSD 07), Lübeck, Germany, August 29-31, 2007.
"Learning Java by a Card Game: A Case Study",
LG2007: Proceedings of Learning with Games Conference, Sophia Antipolis, France, pp. 221–228, September 24-27, 2007.
"Mapping and Topology Customization Approaches for Application-Specific STNoC Designs",
IEEE Proceedings of ASAP'07 - 18th International Conference on Application-specific Systems, Architectures and Processors, Montréal, Québec, Canada, July, 2007.
"A Query Unit for the IPSec Databases",
SECRYPT 2007, Barcelona, Spain, 07/2007.
"A Topology Design Customization Approach for (STNoC)",
Nano-Nets 07, in proceedings of 2nd International Conference on Nano-Networks (Nano-Nets 2007)., Catania, Italy, September 24-26, 2007.