Export 144 results:
Author Title [ Type
] Year Filters: First Letter Of Last Name is R [Clear All Filters]
"Exploring the energy consumption of lightweight blockciphers in FPGA",
International Conference on ReConFigurable Computing and FPGAs, ReConFig 2015, 2015, Rivera Maya, Mexico City, IEEE, pp. 1-6, 02/2016, 2015.
"Exploring the Feasibility of Low Cost Fault Injection Attacks on Sub-Threshold Devices through an Example of a 65nm AES Implementation",
7th Workshop on RFID Security and Privacy (RFIDSec), Amherst, Massachussets, USA, June, 2011.
"Exploring the Vulnerability of R-LWE Encryption to Fault Attacks",
Workshop on Cryptography and Security in Computing Systems of the HiPEAC2018 Conference, CS2 '18, New York, NY, USA, ACM, 2018.
"Fault attacks, injection techniques and tools for simulation",
10th International Conference on Design Technology of Integrated Systems in Nanoscale Era DTIS 2015, Naples, Italy, IEEE, pp. 1-6, 04/2015.
"A First Step Towards Automatic Application of Power Analysis Countermeasures",
48th Design Automation Conference (DAC), San Diego, Califorina, June, 2011.
"FPGA Implementations of the AES Masked Against Power Analysis Attacks",
2nd International Workshop on Constructive Side-Channel Analysis and Secure Design (COSADE), Darmstadt, Germany, February, 2011.
"Fresh Re-Keying II: Securing Multiple Parties against Side-Channel and Fault Attacks",
10th Smart Card Research and Advanced Application Conference (CARDIS), Leuven, Belgium, September, 2011.
"Fresh Re-Keying II: Securing Multiple Parties against Side-Channel and Fault Attacks",
10th Smart Card Research and Advanced Application Conference (CARDIS), Leuven, Belgium, September, 2011.
"Fresh Re-Keying: Security against Side-Channel and Fault Attacks for Low-Cost Devices",
Proceedings of Progress in Cryptology - Africacrypt, Stellenbosch, South Africa, May, 2010.
"Hardware Trojans for Inducing or Amplifying Side-Channel Leakage of Cryptographic Software",
2nd International Conference on Trusted Systems (INTRUST), Beijing, China, December, 2010.
"HardwareScheduling Support in SMP Architecture",
Design, Automation and Test in Europe(DATE), Nice, France, April 16-20, 2007.
"Hardware/Software Partitioning and Interface Synthesis in Networks On Chip",
IP Based SoC Design 2005, Grenoble, France, December 7-8, 2005.
"Hardware/software partitioning of operating systems: a behavioral synthesis approach",
GLSVLSI '06: Proceedings of the 16th ACM Great Lakes symposium on VLSI, Philadelphia, PA, USA, ACM Press, New York, USA, pp. 324–329, 2006.
"High-Level Synthesis of Benevolent Trojans",
Proceedings of the IEEE Design, Automation and Test in Europe Conference (DATE), 2019.
"An improved Hilbert-Huang Transform for non-linear and time-variant signals",
26th Italian Workshop on Neural Networks (WIRN 2016), Vietri sul Mare, Salerno, Italy, pp. 1-8, 05/2016.
"Instruction Set Extensions for secure applications",
Design, Automation Test in Europe Conference DATE 2016, Dresden, Germany, IEEE, pp. 1529-1534, 03/2016.
"Interface Synthesis in Multiprocessing Systems-on-Chips",
IP Based SoC Design 2004, Grenoble, December, 2004.
"Inverse Gating for Low Energy Block Ciphers",
Proceedings of the IEEE International Symposium on Hardware Oriented Security and Trust (HOST), 2018.
"Jailbreak Imagers: Transforming a Single-Photon Image Sensor into a True Random Number Generator",
International Image Sensor Workshop (IISW), Snowbird Resort, Utah, USA, June, 2013.
"Lattice-based cryptography: From reconfigurable hardware to ASIC",
2016 International Symposium on Integrated Circuits (ISIC): IEEE, 12/2016.