Export 204 results:
Author Title [ Type
] Year Filters: First Letter Of Last Name is M [Clear All Filters]
"An ASIC design for a high speed implementation of the hash function SHA-256 (384, 512)",
GLSVLSI '04: Proceedings of the 14th ACM Great Lakes symposium on VLSI, Boston, MA, USA, ACM Press, New York, USA, pp. 421–425, 2004.
"ASIC Hardware Implementation of the IDEA NXT Encryption Algorithm",
IEEE International Symposium on Circuits and Systems, Kos, Greece, May 21-24, 2006.
"Can we Achieve both Privacy Protection and Efficient Malware Detection on Smartphones?",
1st Interdisciplinary Cyber Research Workshop 2015, Tallin, Estona, Tallinn University of Technology, 07/2015.
"Can we Achieve both Privacy Protection and Efficient Malware Detection on Smartphones?",
1st Interdisciplinary Cyber Research Workshop 2015, Tallin, Estona, Tallinn University of Technology, 07/2015.
"The Certicom Challenges ECC2-X",
Workshop on Special Purpose Hardware for Attacking Cryptographic Systems (SHARCS), Lausanne, Switzerland, September, 2009.
"Challenges in designing trustworthy cryptographic co-processors",
IEEE International Symposium on Circuits and Systems (ISCAS) 2015, Lisbon, Portugal, IEEE, pp. 2009-2012, 09/2015.
"Code Generation from Statecharts: Simulation of Wireless Sensor Networks",
Proceedings of DSD08, Parma, Italy, September, 2008.
"Comparison of Two Cameras based on Single Photon Avalanche Diodes (SPADS) for Fluorescence Lifetime Imaging Application with Picosecond Resolution",
International Image Sensor Workshop (IISW), Snowbird Resort, Utah, USA, June, 2013.
"A Conceptual Solution for Integration of EV Charging with Smart Grids ",
International Conference on Smart Grid and Clean Energy Technologies - ICSGCE 2014 , Dubai, 10/2014.
"COOPER: Towards A Collaborative Open Environment of Project-centred Learning",
proceedings to EC-TEL'06 conference, Crete, Greece, October 1-4, 2006.
"COOPER: Towards A Collaborative Open Environment of Project-centred Learning",
proceedings to EC-TEL'06 conference, Crete, Greece, October 1-4, 2006.
"A Correlation-based Design Space Exploration Methodology for Multi-Processor Systems-on-Chip",
Proceedings of DAC 2010: Design Automation Conference, Anheim, CA, USA, pp. 120–125, June, 2010.
"Cross-layer Design of Reconfigurable Cyber-Physical Systems",
Proceedings of Design, Automation and Test in Europe (DATE) 2017, 2017.
"Cross-layer Design of Reconfigurable Cyber-Physical Systems",
Proceedings of Design, Automation and Test in Europe (DATE) 2017, 2017.
"The Design of a High Speed ASIC Unit for the Hash Function SHA-256 (384,512)",
DATE '04: Proceedings of the conference on Design, automation and test in Europe, Washington, DC, USA, IEEE Computer Society, pp. 30070, 2004.
"Design of Fault Tolerant Network Interfaces for NoCs",
Proceedings of 14th EUROMICRO Conference on Digital System Design Architectures, Methods and Tools (DSD'11), Oulu, Finland, September, 2011.
"A Design Space Exploration Methodology Supporting Run-Time Resource Management for Multi-Processors System on-Chip",
Proceedings IEEE SASP'09 - Symposium on Application Specific Processors, San Francisco, CA, USA, July, 2009.
"Design Space Exploration of PISA Architecture For ONU Auto-discovery Process",
proceedings of 6th International Conference of Electrical Engineering (ICEENG), Cairo, Egypt, May 27-29, 2009.
"Development cost and size estimation starting from high-level specifications",
CODES '01: Proceedings of the ninth international symposium on Hardware/software codesign, Copenhagen, Denmark, ACM Press, New York, USA, pp. 86-91, 2001.
"DRuiD: Designing Reconfigurable Architectures with Decision-making Support",
19th Asia and South Pacific Design Automation Conference (ASP-DAC), Singapore, 01/2014.