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Education and Innovation in Embedded Systems Design

USI Università della Svizzera italiana, USI Faculty of Informatics, Advanced Learning and Research Institute USI Università della Svizzera italiana USI Faculty of Informatics USI Advanced Learning and Research Institute
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Ferrante, A., and V. Piuri, "High-level Architecture of an IPSec-dedicated System on Chip", proceedings of NGI 2007, Trondheim, Norway, IEEE Press, May, 2007.
I
Fiorin, L., S. Luković, and G. Palermo, "Implementation of a Reconfigurable Data Protection Module for NoC-based MPSoCs", Proceedings of the 21st IPDPS 2007 Reconfigurable Architecture Workshop (RAW), 21th IEEE International Parallel and Distributed Processing Symposium, Miami, USA/FL, April, 2008.
Ferrante, A., S. Chandra, and V. Piuri, "IPSec Database Query Acceleration", E-business and Telecommunications, vol. 23: Springer Berlin Heidelberg, pp. 188-200, 2009.
Ferrante, A., S. Chandra, and V. Piuri, "IPSec Database Query Acceleration", E-business and Telecommunications, vol. 23: Springer Berlin Heidelberg, pp. 188-200, 2009.
M
Milosevic, J., A. Ferrante, and M. Malek, "MalAware: Effective and Efficient Run-time Mobile Malware Detector", The 14th IEEE International Conference on Dependable, Autonomic and Secure Computing (DASC 2016), Auckland, New Zealand, IEEE Computer Society Press, 08/2016.
Dadda, L., A. Ferrante, and M. Macchetti, "A Memory Unit for Priority Management in IPSec Accelerators", proceedings of ICC07. Glasgow, Scotland: IEEE Communications Society, Glasgow, Scotland, June 24, 2007.
Macchetti, M., S. Marchesin, U. Bondi, L. Breveglieri, G M. Bertoni, and P. Fragneto, Method and circuit for data encryption/decryption, , no. US 09/974,705, April, 2003.
Macchetti, M., P. Fragneto, and G M. Bertoni, Method of implementing one-to-one binary function and relative hardware device, especially for a Rijndael S-box, , no. US 10/816,791 -- EP 20030425211, 10/2004.
Boiko, U., A. Ferrante, A. Lo Duca, and V. Piuri, "A Methodology for Testing IPSec-based Systems", SoftCOM 2004, Split, pp. 22-26, October, 2004.
Derin, O., E. Diken, and L. Fiorin, "A Middleware Approach to Achieving Fault-tolerance of Kahn Process Networks on Networks-on-Chips", International Journal of Reconfigurable Computing, vol. 2011, no. Article ID 295385: Hindawi, pp. 14 pages, February, 2011.
Kaitović, I., R. Rezende, C. Murillo, and C. Fantuzzi, "Model-driven approach to design ICT infrastructure for precision farming", 17th IEEE Conference on Emerging Technologies and Factory Automation (ETFA), Kraków, Poland, IEEE Industrial Electronics Society, 09/2012.
Ferrante, A., I. Kaitović, and J. Milosevic, "Modeling Requirements For Security-enhanced Design of Embedded Systems", ICETE SECRYPT, Vienna, Austria, ICETE, 08/2014.
Dittrich, A., B. Lichtblau, R. Rezende, and M. Malek, "Modeling Responsiveness of Decentralized Service Discovery in Wireless Mesh Networks", MMB & DFT, vol. 8376: Springer International Publishing Switzerland, pp. 88-102, 2014.
Mura, M., F. Fabbri, and M. Sami, "Modelling the Power Cost of Security in Wireless Sensor Networks : the Case of 802.15.4", Proceedings of IEEE ICT08, Saint Petersburg, Russia, June, 2008.
Fiorin, L., G. Palermo, and C. Silvano, "A Monitoring System for NoCs", Proceedings of the Third International Workshop on Network on Chip Architectures (NoCArc'2010), Atlanta, Georgia, USA, December, 2010.
Fiorin, L., G. Palermo, and C. Silvano, "MPSoCs Run-Time Monitoring through Networks-on-Chip", The 2009 Conference on Design, Automation and Test In Europe (DATE'09), Nice, France, April/2009.
Silvano, C., W. Fornaciari, G. Palermo, V. Zaccaria, F. Castro, M. Martinez, S. Bocchio, R. Zafalon, P. Avasare, G. Vanmeerbeeck, et al., "The MULTICUBE Design Flow", Multi-objective Design Space Exploration of Multiprocessor SoC Architectures: Springer New York, pp. 3-17, 2011.
Silvano, C., W. Fornaciari, G. Palermo, V. Zaccaria, F. Castro, M. Martinez, S. Bocchio, R. Zafalon, P. Avasare, G. Vanmeerbeeck, et al., "The MULTICUBE Design Flow", Multi-objective Design Space Exploration of Multiprocessor SoC Architectures: Springer New York, pp. 3-17, 2011.
Silvano, C., W. Fornaciari, G. Palermo, V. Zaccaria, F. Castro, M. Martinez, S. Bocchio, R. Zafalon, P. Avasare, G. Vanmeerbeeck, et al., "Multicube: Multi-objective design space exploration of multi-core architectures", ISVLSI 2010: IEEE Annual Symposium on VLSI, Lixouri, Kefalonia - Greece, pp. 488–493, July, 2010.
Silvano, C., W. Fornaciari, G. Palermo, V. Zaccaria, F. Castro, M. Martinez, S. Bocchio, R. Zafalon, P. Avasare, G. Vanmeerbeeck, et al., "MULTICUBE: Multi-Objective Design Space Exploration of Multi-Core Architectures", VLSI 2010 Annual Symposium, vol. 105, Netherlands, Springer, pp. 47-63, 2011.

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