"Hardware/Software Partitioning and Interface Synthesis in Networks On Chip",
IP Based SoC Design 2005, Grenoble, France, December 7-8, 2005.
"A Methodology for Bridging the Gap between UML and Codesign",
UML for SOC Design, Dordrecht, The Netherlands, Springer, pp. 119-146, 2005.
"Quasi-Pipelined Hash Circuits",
IEEE ARITH 17, Cape Cod, pp. 222-229, June, 2005.
"Small-scale Variants of the Secure Hash Standard",
ECRYPT workshop on RFID and lightweight cryptography, Graz, Austria, July 14-15, 2005.
"Speeding Security on the Intel StrongARM",
Embedded Intel Solutions, pp. 31-33, 2005.
"The ALaRI Intranet: a Remote Collaboration Platform for a Worldwide Learning and Research Network",
World Conference on Educational Multimedia, Hypermedia and Telecommunications 04 (ED-MEDIA 04), Lugano, Switzerland, AACE Press, pp. 5042-5047, 2004.
"An ASIC design for a high speed implementation of the hash function SHA-256 (384, 512)",
GLSVLSI '04: Proceedings of the 14th ACM Great Lakes symposium on VLSI, Boston, MA, USA, ACM Press, New York, USA, pp. 421–425, 2004.
"The Design of a High Speed ASIC Unit for the Hash Function SHA-256 (384,512)",
DATE '04: Proceedings of the conference on Design, automation and test in Europe, Washington, DC, USA, IEEE Computer Society, pp. 30070, 2004.
"Efficient AES implementations for ARM based platforms",
SAC '04: Proceedings of the 2004 ACM symposium on Applied computing, Nicosia, Cyprus, ACM Press, New York, USA, pp. 841–845, 2004.
"FSM–based power modeling of wireless protocols: the case of bluetooth",
ISLPED '04: Proceedings of the 2004 international symposium on Low power electronics and design, Newport Beach, California, USA, ACM Press, New York, USA, pp. 369-374, 2004.
"Interface Synthesis in Multiprocessing Systems-on-Chips",
IP Based SoC Design 2004, Grenoble, December, 2004.
Method of implementing one-to-one binary function and relative hardware device, especially for a Rijndael S-box,
, no. US 10/816,791 -- EP 20030425211, 10/2004.
"A Methodology for Testing IPSec-based Systems",
SoftCOM 2004, Split, pp. 22-26, October, 2004.
"UML in an Electronic System Level Design Methodology",
UML-SOC'04, San Diego, California, pp. 47-52, June 6, 2004.
"UML Specifications Towards a Codesign Environment",
FDL'04, Lille, France, pp. 313-324, September 14-17, 2004.
"UML System-Level Analysis and Design of Secure Communication Schemes for Embedded Systems",
FDL'04, Lille, France, pp. 301-312, September 14-17, 2004.
"UML-based specifications of an embedded system oriented to HW/SW partitioning: a case study",
Languages for system specification: Selected contributions on UML, systemC, system Verilog, mixed-signal systems, and property specification from FDL'03, Norwell, MA, USA, Kluwer Academic Publishers, pp. 71-84, 2004.
"About the Performances of the Advanced Encryption Standard in Embedded Systems with Cache Memory",
ISCAS 2003, Bangkok, pp. 145-148, May 25-28, 2003.
"An Application Level Synthesis Methodology for Multidimensional Embedded Processing Systems",
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 22, no. 11, pp. 1457-1470, November, 2003.
"Efficient Software Implementation of AES on 32-Bit Platforms",
CHES '02: Revised Papers from the 4th International Workshop on Cryptographic Hardware and Embedded Systems, London, UK, Springer-Verlag, pp. 159–171, 2003.