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Education and Innovation in Embedded Systems Design

USI Università della Svizzera italiana, USI Faculty of Informatics, Advanced Learning and Research Institute USI Università della Svizzera italiana USI Faculty of Informatics USI Advanced Learning and Research Institute
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Author Title Type [ Year(Asc)]
2007
Giaconia, M., M. Macchetti, F. Regazzoni, and K. Schramm, "Area and Power Efficient Synthesis of DPA-Resistant Cryptographic SBoxes", International Conference on VLSI Design & Embedded Systems, Bangalore, India, January 6-10, 2007.
Fiorin, L., G. Palermo, S. Luković, and C. Silvano, "A Data protection Unit for NoC-based Architecture", CODES+ISSS 2007, in proceedings of the Fifth IEEE/ACM/FIP International Conference of Hardware/Software Codesign and System Synthesis (CODES+ISSS 2007), Salzburg, Austria, September 30, 2007.
Ferrari, F., and E. Amador, "Design exploration for an Ogg/Vorbis decoder for VLIW architectures", Workshop on Application Specific Processors (WASP '07), Salzburg, Austria, October, 2007.
Nacul, A C., F. Regazzoni, and M. Lajolo, "HardwareScheduling Support in SMP Architecture", Design, Automation and Test in Europe(DATE), Nice, France, April 16-20, 2007.
Ferrante, A., and V. Piuri, "High-level Architecture of an IPSec-dedicated System on Chip", proceedings of NGI 2007, Trondheim, Norway, IEEE Press, May, 2007.
Prevostini, M., Introduction to SysML, , April 20, 2007.
Derin, O., "Learning Java by a Card Game: A Case Study", LG2007: Proceedings of Learning with Games Conference, Sophia Antipolis, France, pp. 221–228, September 24-27, 2007.
Palermo, G., G. Mariani, C. Silvano, R. Locatelli, and M. Coppola, "Mapping and Topology Customization Approaches for Application-Specific STNoC Designs", IEEE Proceedings of ASAP'07 - 18th International Conference on Application-specific Systems, Architectures and Processors, Montréal, Québec, Canada, July, 2007.
Dadda, L., A. Ferrante, and M. Macchetti, "A Memory Unit for Priority Management in IPSec Accelerators", proceedings of ICC07. Glasgow, Scotland: IEEE Communications Society, Glasgow, Scotland, June 24, 2007.
Zaparanuks, D., M. Jović, and M. Hauswirth, "The Potential of Speculative Class-Loading", PPPJ 2007: Proceedings of the Principles and Practice of Programming in Java, Lisbon, Portugal, 2007.
Regazzoni, F., T. Eisenbarth, J. Großschädl, L. Breveglieri, P. Ienne, I. Koren, and C. Paar, "Power Attacks Resistance of Cryptographic S-boxes with added Error Detection Circuits", proceedings of: '22nd IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems (DFT'07), Rome, Italy, September 26-28, 2007.
Mura, M., M. Paolieri, L. Negri, F. Fabbri, and M. Sami, "Power Modeling and Power Analysis for IEEE 802.15.4: a Concurrent State Machine Approach", Proceedings of CCNC 2007, Las Vegas, USA, January 11-13, 2007.
Ferrante, A., S. Chandra, and V. Piuri, "A Query Unit for the IPSec Databases", SECRYPT 2007, Barcelona, Spain, 07/2007.
Giesbers, B., A V. Taddeo, W. van der Vegt, J. van Bruggen, and R. Koper, "A Question Answering service for information retrieval in Cooper", COOPER Workshop in conjunction with EC-TEL07 Conference, September 17, 2007.
Otero, J., F. Regazzoni, and M. Lajolo, "Rapid Creation of Application Models from Bandwidth Aware Core Graphs", Proceedings of: IP Based SoC Design 2007, Grenoble, France, December 5-6, 2007.
Paolieri, M., I. Bonesana, and M D. Santambrogio, "ReCPU: a Parallel and Pipelined Architecture for Regular Expression Matching", Proceedings of 15th Annual IFIP International Conference on Very Large Scale Integration {(IFIP-VLSI 07)},(best paper award), Atlanta, Georgia, USA, October 15-17, 2007.
Salvioni, C., and A V. Taddeo, "Remote Cooperation on Project-centred Learning: a Working Implemented Solution in Academia", COOPER Workshop in conjunction with EC-TEL07 Conference, September 17, 2007.
Bozzon, A., T. Iofciu, W. Nejdl, A V. Taddeo, and S. Tonnies, "Role Based Access Control for the interaction with Search Engines", COOPER Workshop in conjunction with EC-TEL07 Conference, September 17, 2007.
Mura, M., and M. Paolieri, "SC2: State Charts to System C: Automatic Executable Models Generation", proceedings FDL07, Barcelona, Spain, September, 2007.
Taddeo, A V., and A. Ferrante, "Scheduling Small packets in IPSec Multi-accelerator Based Systems", Journal of Communication(JCM) Academy publisher, vol. 2, no. 2, Stresa, Italy, pp. 53-60, March, 2007.

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