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Education and Innovation in Embedded Systems Design

USI Università della Svizzera italiana, USI Faculty of Informatics, Advanced Learning and Research Institute USI Università della Svizzera italiana USI Faculty of Informatics USI Advanced Learning and Research Institute
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Conference Paper
Choudhury, A D., G. Palermo, C. Silvano, and V. Zaccaria, "Yield Enhancement by Robust Application-specific Mapping on Network-on-Chips", NoCArc'09: Proceedings of the Second International Workshop on Network on-Chip Architectures, New York City, USA, pp. 37–42, December, 2009.
Prevostini, M., A V. Taddeo, K. Balać, I. Rigamonti, J. Baumgärtner, and M. Jermini, "WAMS - an adaptive system for knowledge acquisition and decision support: the case of Scaphoideus titanus", IOBC/WPRS European Meeting, Lacanau, France, Working Group on Integrated Protection and Production in Viticulture, pp. 57-64, 10/2011.
Mariani, G., V-M. Sima, G. Palermo, V. Zaccaria, C. Silvano, and K. Bertels, "Using Multi-objective Design Space Exploration to Enable Run-time Resource Management for Reconfigurable Architectures", Proc. Design, Automation Test in Europe Conf. Exhibition (DATE), March, 2012.
Argyris, I., M. Mura, and M. Prevostini, "Using MARTE for Designing power Supply Section of WSNs", M-BED 2010: Proceedings of the 1st Workshop on Model Based Engineering for Embedded Systems Design (a DATE 2010 Workshop), Dresden, Germany, March 12, 2010.
Minosi, A., S. Mankan, A. Martinola, F. Balzarini, A N. Kostadinov, and M. Prevostini, "UML-based Specifications of an Embedded System Oriented to HW/SW Partitioning: a Case Study", FDL'03, Frankfurt, pp. 226-237, September 23-26, 2003.
Piscopo, G., M. Prevostini, and I. Stefanini, "UML System-Level Analysis and Design of Secure Communication Schemes for Embedded Systems", FDL'04, Lille, France, pp. 301-312, September 14-17, 2004.
Piscopo, G., M. Prevostini, and I. Stefanini, "UML System-Level Analysis and Design of Secure Communication Schemes for Embedded Systems", FDL'04, Lille, France, pp. 301-312, September 14-17, 2004.
Lajolo, M., A S. Basu, and M. Prevostini, "UML Specifications Towards a Codesign Environment", FDL'04, Lille, France, pp. 313-324, September 14-17, 2004.
Basu, A S., M. Lajolo, and M. Prevostini, "UML in an Electronic System Level Design Methodology", UML-SOC'04, San Diego, California, pp. 47-52, June 6, 2004.
Polian, I., G. Becker, and F. Regazzoni, "Trojans in Early Design Steps - An Emerging Threat", TRUDEVICE Final Conference (FCTRU’16), 2016.
Cannella, E., L. Di Gregorio, L. Fiorin, M. Lindwer, P. Meloni, O. Neugebauer, and A. Pimentel, "Towards an ESL design framework for adaptive and fault-tolerant MPSoCs: MADNESS or not?", Embedded Systems for Real-Time Multimedia (ESTIMedia), 2011 9th IEEE Symposium on, 2011.
Balać, K., M. Akhmedov, M. Prevostini, and M. Malek, "Topology Optimization of Wireless Localization Networks", European Wireless 2016 , Oulu, Finland, 05/2016.
Palermo, G., G. Mariani, C. Silvano, R. Locatelli, and M. Coppola, "A Topology Design Customization Approach for (STNoC)", Nano-Nets 07, in proceedings of 2nd International Conference on Nano-Networks (Nano-Nets 2007)., Catania, Italy, September 24-26, 2007.
Balać, K., P. Andres Di Giulio, A V. Taddeo, and M. Prevostini, "Time of Flight Error Compensation for In-Tunnel Vehicle Localization", The Fourth International Workshop on Pervasive Networks for Emergency Management, 2014 (PerNEM'14), Budapest, Hungary, IEEE, 03/2014.
Pilato, C., F. Regazzoni, R. Karri, and S. Garg, "TAO: Techniques for Algorithmic Obscuration during High-Level Synthesis", Proceedings of the ACM/IEEE Design Automation Conference (DAC), 2018.
Minosi, A., A. Martinola, S. Mankan, and M. Prevostini, "System-level design of embedded applications by UML: the Wireless Meter Reading case", MSy2002 Workshop, Winterthur, pp. 181-187, October 3-4, 2002.
Becker, G., F. Regazzoni, C. Paar, and W. Burleson, "Stealthy Dopant-Level Hardware Trojans", Workshop on Cryptographic Hardware and Embedded Systems (CHES), Santa Barbara, California, USA, August, 2013.
Mura, M., M. Paolieri, L. Negri, and M. Sami, "StateCharts to SystemC: a High Level Hardware Simulation Approach", Proceedings of GLSVLSI 2007, Stresa, Italy, March 11-13, 2007.
Luković, S., P. Pezzino, and L. Fiorin, "Stack Protection Unit as a step towards securing MPSoCs", Proceedings of 24th IEEE International Parallel and Distributed Processing Symposium (IPDPS), Atlanta, USA, April 19-23, 2010.
Barenghi, A., G. Pelosi, and F. Regazzoni, "Simulation-Time Security Margin Assessment against power-based Side Channel Attacks", 7th Workshop on Embedded Systems Security (WESS), Tampere, Finland, October, 2012.

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