Export 16 results:
Author [ Title] Type Year Filters: First Letter Of Title is R [Clear All Filters]
"Run-time Selection of Security Algorithms For Networked Devices",
5th ACM International Symposium on QoS and Security for Wireless and Mobile Networks, Tenerife, Canary Islands, Spain, 2009.
"Run-time Optimization of a Dynamically Reconfigurable Embedded System Through Performance Prediction",
23rd International Conference on Field Programmable Logic and Applications (FPL), Porto, Portugal, IEEE, 09/2013.
"Runtime Classification of Mobile Malware for Resource-constrained Devices",
Lecture Notes in Communications in Computer and Information Science, vol. 764: Springer International Publishing AG, pp. 195-215, 2017.
"Round gating for low energy block ciphers",
2016 IEEE International Symposium on Hardware Oriented Security and Trust, HOST, McLean, VA, USA, IEEE Computer Society, pp. 55-60, 05/2016.
"Role Based Access Control for the interaction with Search Engines",
COOPER Workshop in conjunction with EC-TEL07 Conference, September 17, 2007.
"Risk Assessment of Atrial Fibrillation: a Failure Prediction Approach",
41st Computing in Cardiology Conference (CinC), Cambridge, MA, USA, IEEE Computer Society, 09/2014.
"Rethinking Secure FPGAs: TowardsCryptography-friendly Configurable Cell Architecture and its Automated Design Flow",
Proceedings of FCCM, 05/2018.
"Responsiveness of Service Discovery in Wireless Mesh Networks",
20th Pacific Rim International Symposium on Dependable Computing (PRDC), Singapore, IEEE Computer Society, 11/2014.
"Response Surface Modeling for Embedded System Design Space Exploration",
Multi-objective design space exploration of multiprocessor SoC architectures: the MULTICUBE approach, New York, USA, Springer, 2011.
"A Resource-optimized Approach to Efficient Early Detection of Mobile Malware",
3rd International Workshop on Security of Mobile Applications - IWSMA 2014, Fribourg, Switzerland, 09/2014.
"Remote Cooperation on Project-centred Learning: a Working Implemented Solution in Academia",
COOPER Workshop in conjunction with EC-TEL07 Conference, September 17, 2007.
"Reducing Timing Overhead in Simultaneously Clock-Gated and Power-Gated Designs by Placement-Aware Clustering",
Proceedings of the 19th international workshop on Power and Timing Modeling, Optimization and Simulation (PATMOS 2009), Delft, The Netherlands, September 9-11, 2009.
"ReCPU: a Parallel and Pipelined Architecture for Regular Expression Matching",
Proceedings of 15th Annual IFIP International Conference on Very Large Scale Integration {(IFIP-VLSI 07)},(best paper award), Atlanta, Georgia, USA, October 15-17, 2007.
"A Reconfigurable Multiprocessor Architecture for a Reliable Face Recognition Implementation",
Proceedings of Design, Automation and Test in Europe (DATE) Conference, Dresden, Germany, March, 2010.
Reconfigurable Logic Circuit,
, no. GB1719355.8, 11/2017, Submitted.
"Rapid Creation of Application Models from Bandwidth Aware Core Graphs",
Proceedings of: IP Based SoC Design 2007, Grenoble, France, December 5-6, 2007.