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"A Fast ULV Logic Synthesis Flow in Many-Vt CMOS Processes for Minimum Energy under Timing Constraints",
IEEE Transactions on Circuits and Systems II, vol. 59, issue 12, pp. 947-951, 2013.
"Jailbreak Imagers: Transforming a Single-Photon Image Sensor into a True Random Number Generator",
International Image Sensor Workshop (IISW), Snowbird Resort, Utah, USA, June, 2013.
"Lightweight AES-Based Authenticated Encryption",
Fast Software Encryption (FSE), Singapore, March, 2013.
"Single-Photon Image Sensors",
Special Session, 50th Design Automation Conference (DAC), Austin, Texas, USA, June, 2013.
"Sleuth: Automated Verification of Software Power Analysis Countermeasures",
Workshop on Cryptographic Hardware and Embedded Systems (CHES), Santa Barbara, California, USA, August, 2013.
"Stealthy Dopant-Level Hardware Trojans",
Workshop on Cryptographic Hardware and Embedded Systems (CHES), Santa Barbara, California, USA, August, 2013.
"Accelerating differential power analysis on heterogeneous systems",
The 9th Workshop on Embedded Systems Security (WESS) 2014, New Delhi, India, ACM, 10/2014.
"A Combined Design-Time/Test-Time Study of the Vulnerability of Sub-Threshold Devices to Low Voltage Fault Attacks",
IEEE Transactions on Emerging Topics in Computing, vol. PP, issue 99, 04/2014.
"Embedded Systems Education: Job Market Expectations",
Workshop on Embedded and Cyber-Physical Systems Education (WESE) , New Delhi, India, ACM, 10/2014.
"Malicious Wave: a Survey on Actively Tampering Using Electromagnetic Glitch",
International Symposium on Electromagnetic Compatibility 2014, 08/2014.
"Security IPs and IP Security with FPGAs",
Secure Smart Embedded Devices Platform and Applications, 2014.
"Simulation-Time Security Margin Assessment against Power-Based Side Channel Attacks",
(IACR) Cryptology ePrint Archive, vol. 2014, 05/2014.
"Single-Photon Avalanche Diodes (SPADs) for quantum random number generators and beyond",
19th Asia and South Pacific Design Automation Conference (ASP-DAC) 2014, Singapore, IEEE, 01/2014.
"Stealthy Dopant-Level Hardware Trojans: Extended Version",
Journal of Cryptographic Engineering, vol. 4, issue 1, pp. 19-31, 04/2014.
"(THOR) - The hardware onion router",
24th International Conference on Field Programmable Logic and Applications, (FPL) 2014, Munich, Germany, IEEE, 09/2014.
"200 MS/s ADC implemented in a FPGA employing TDCs",
FPGA International Symposium on Field-Programmable Gate Arrays ACM/SIGDA 2015, Monterey, CA, USA, ACM, pp. 228-235, 02/2015.
"Automatic Application of Power Analysis Countermeasures",
IEEE Transactions on Computers , vol. 64, issue 2, pp. 329-341, 02/2015.
"Challenges in designing trustworthy cryptographic co-processors",
IEEE International Symposium on Circuits and Systems (ISCAS) 2015, Lisbon, Portugal, IEEE, pp. 2009-2012, 09/2015.
"Design methodologies for securing cyber-physical systems",
2015 International Conference on Hardware/Software Codesign and System Synthesis CODES+ISSS, Amsterdam, Netherlands, IEEE, pp. 30-36, 10/2015.
"Exploring Energy Efficiency of Lightweight Block Ciphers",
(IACR) Cryptology ePrint Archive, vol. 2015, 09/2015.