Export 15 results:
Author Title Type [ Year
] Filters: First Letter Of Title is I [Clear All Filters]
"Impact of Failure Prediction on Availability: Modeling and Comparative Analysis of Predictive and Reactive Methods",
IEEE Transactions on Dependable and Secure Computing, pp. 1-1, 2018.
"Inverse Gating for Low Energy Block Ciphers",
Proceedings of the IEEE International Symposium on Hardware Oriented Security and Trust (HOST), 2018.
"Investigating echo state networks dynamics by means of recurrence analysis",
IEEE Transactions on Neural Networks and Learning Systems, vol. 29, pp. 427 - 439, 02/2018.
"An Incremental Change Detection Test Based on Density Difference Estimation",
IEEE Transactions on Systems, Man, and Cybernetics: Systems, vol. 47, pp. 2714-2726, Oct, 2017.
"An Investigation of Sources of Randomness Within Discrete Gaussian Sampling",
IACR Cryptology ePrint Archive, vol. 2017, pp. 298, 2017.
"An improved Hilbert-Huang Transform for non-linear and time-variant signals",
26th Italian Workshop on Neural Networks (WIRN 2016), Vietri sul Mare, Salerno, Italy, pp. 1-8, 05/2016.
"Instruction Set Extensions for secure applications",
Design, Automation Test in Europe Conference DATE 2016, Dresden, Germany, IEEE, pp. 1529-1534, 03/2016.
"Interaction between Fault Attack Countermeasures and the Resistance against Power Analysis Attacks",
Fault Analysis in Cryptography: Springer Berlin Heidelberg, pp. 257-272, 2012.
"An industrial design space exploration framework for supporting run-time resource management on multi-core systems",
Proceedings of Design, Automation and Test in Europe (DATE) Conference, Dresden, Germany, March, 2010.
"IPSec Database Query Acceleration",
E-business and Telecommunications, vol. 23: Springer Berlin Heidelberg, pp. 188-200, 2009.
"Implementation of a Reconfigurable Data Protection Module for NoC-based MPSoCs",
Proceedings of the 21st IPDPS 2007 Reconfigurable Architecture Workshop (RAW), 21th IEEE International Parallel and Distributed Processing Symposium, Miami, USA/FL, April, 2008.
Introduction to SysML,
, April 20, 2007.
"Interface Synthesis in Multiprocessing Systems-on-Chips",
IP Based SoC Design 2004, Grenoble, December, 2004.
"Intelligent, low-power and low-cost measurement system for energy consumption",
VECIMS 2003, Lugano, pp. 125-130, July 27-29, 2003.
"An Instruction-Level Methodology for Power Estimation and Optimization of Embedded VLIW cores",
DATE 2002, Paris, pp. 1128, March 4-8, 2002.