@article {18591, title = {Black-Hat High-Level Synthesis: Myth or Reality?}, journal = {IEEE Transactions on Very Large Scale Integration Systems}, year = {In Press}, doi = {10.1109/TVLSI.2018.2884742}, author = {Pilato, Christian and Basu, Kanad and Regazzoni, Francesco and Karri, Ramesh} } @article {18553, title = {Enabling Automated Bug Detection for IP-based Designs using High-Level Synthesis}, journal = {IEEE Design \& Test}, year = {In Press}, month = {2018}, doi = {10.1109/MDAT.2018.2824121}, author = {Fezzardi, Pietro and Pilato, Christian and Ferrandi, Fabrizio} } @article {18552, title = {TaintHLS: High-Level Synthesis For Dynamic Information Flow Tracking}, journal = {IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems}, year = {In Press}, doi = {10.1109/TCAD.2018.2834421}, author = {Pilato, Christian and Garg, Siddharth and Wu, Kaijie and Karri, Ramesh and Regazzoni, Francesco} } @conference {18590, title = {High-Level Synthesis of Benevolent Trojans}, booktitle = {Proceedings of the IEEE Design, Automation and Test in Europe Conference (DATE)}, year = {2019}, author = {Pilato, Christian and Basu, Kanad and Shayan, Mohammed and Regazzoni, Francesco and Karri, Ramesh} } @conference {18556, title = {Bridging the Gap between Software and Hardware Designers Using High-Level Synthesis}, booktitle = {Advances in Parallel Computing}, year = {2018}, doi = {10.3233/978-1-61499-843-3-622}, author = {Pilato, Christian} } @article {18549, title = {The Case for Polymorphic Registers in Dataflow Computing}, journal = {International Journal of Parallel Programming}, volume = {54}, issue = {5}, year = {2018}, month = {10/2018}, pages = {54-62}, chapter = {54}, doi = {10.1007/s10766-017-0494-1}, author = {Ciobanu, Catalin B. and Gaydadjiev, Georgi and Pilato, Christian and Sciuto, Donatella} } @conference {18551, title = {Dark{M}em: Fine-Grained Power Management of Local Memories for Accelerators in Embedded Systems}, booktitle = {Proceedings of the Asia and South Pacific Design Automation Conference (ASPDAC)}, year = {2018}, doi = {10.1109/ASPDAC.2018.8297403}, author = {Pilato, Christian and Carloni, Luca P.} } @article {18554, title = {Securing Hardware Accelerators: a New Challenge for High-Level Synthesis}, journal = {IEEE Embedded Systems Letters}, volume = {3}, issue = {10}, year = {2018}, month = {11/2017}, pages = {77-80}, chapter = {77}, doi = {10.1109/LES.2017.2774800}, author = {Pilato, Christian and Garg, Siddharth and Karri, Ramesh and Regazzoni, Francesco} } @conference {18555, title = {TAO: Techniques for Algorithmic Obscuration during High-Level Synthesis}, booktitle = {Proceedings of the ACM/IEEE Design Automation Conference (DAC)}, year = {2018}, doi = {10.1145/3195970.3196126}, author = {Pilato, Christian and Regazzoni, Francesco and Karri, Ramesh and Garg, Siddharth} } @article {18550, title = {System-Level Optimization of Accelerator Local Memory for Heterogeneous Systems-on-Chip}, journal = {IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems}, volume = {36}, year = {2017}, pages = {435-448}, keywords = {algorithm design and analysis, Data structures, hardware, hardware accelerator, High-Level Synthesis, IP networks, Memory Design, Memory management, Multi-bank Architecture, Random access memory}, doi = {10.1109/TCAD.2016.2611506}, author = {Pilato, Christian and Mantovani, Paolo and Di Guglielmo, Giuseppe and Carloni, Luca P.} }