@conference {18588,
	title = {SCA-Resistance for AES: How Cheap Can We Go?},
	booktitle = {Progress in Cryptology {\textendash} AFRICACRYPT 2018},
	year = {2018},
	publisher = {Springer International Publishing},
	organization = {Springer International Publishing},
	address = {Cham},
	abstract = {This paper introduces a novel AES structure capable of improving the robustness against power analysis attacks while allowing for a very compact structure with a potentially negligible area and performance impact. The proposed design is based on a low entropy masking scheme, where half of the time the true value and half of the time the complemented value are used to mask the power consumption variation. The obtained experimental results suggest that the area overhead for the protection against power analysis is as low as 5{\%} LUT increase with a performance degradation of about 10{\%}. When compared with the state of the art supported on FPGAs, efficiency improvements above 6 times and a throughput improvement of at least two times higher are achieved.},
	isbn = {978-3-319-89339-6},
	author = {Chaves, Ricardo and Chmielewski, {\L}ukasz and Regazzoni, Francesco and Batina, Lejla},
	editor = {Joux, Antoine and Nitaj, Abderrahmane and Rachidi, Tajjeeddine}
}
@inbook {18572,
	title = {Hardware Security and Trust: Design and Deployment of Integrated Circuits in a Threatened Environment},
	year = {2017},
	publisher = {Springer},
	organization = {Springer},
	edition = {First edition; 2016},
	author = {Sklavos, Nicolas and Chaves, Ricardo and Di Natale, Giorgio and Regazzoni, Francesco}
}
@conference {18469,
	title = {Accelerating differential power analysis on heterogeneous systems},
	booktitle = {The 9th Workshop on Embedded Systems Security (WESS) 2014},
	year = {2014},
	month = {10/2014},
	publisher = {ACM},
	organization = {ACM},
	address = {New Delhi, India},
	abstract = {Differential Power Analysis (DPA) attacks allows discovering the secret key stored into secure embedded systems by exploiting the correlation between the power consumed by a device and the data being processed. The computation involved is generally relatively simple, however, if the used power traces are composed by a large number of points, the processing time can be long. In this paper we aim at speeding up the so called correlation power analysis (CPA). To do so, we used the OpenCL framework to distribute the workload of the attack over an heterogeneous platform composed by a CPU and multiple accelerators. We concentrate in the computation of the Pearson{\textquoteright}s correlation coefficients, as they cover approximately 80\% of the overall execution time, and we further optimize the attack by minimizing the data transfers between the host processor and the GPUs. Our results show performance improvements of up to 9x when compared with the reference parallel implementation},
	keywords = {heterogeneous systems, power analysis},
	isbn = {978-1-4503-2932-3},
	doi = {10.1145/2668322.2668326},
	url = {http://doi.acm.org/10.1145/2668322.2668326},
	author = {Amaral, Joao and Regazzoni, Francesco and Tomas, Pedro and Chaves, Ricardo}
}
